COMPETENCIES SCOPE OF INTERVATION
- Hardware Schematic development
- Digital IC design for test purpose: FPGA (Xilinx VirteX Pro, VHDL)
- Circuit and logic design, simulation and verification
- Simulation of VHDL programs with Xilinx ISE software (ModelSim)
3. Software Development
- Java and C Software programming.
- Research and Development ILS (GALILEO) Technical Requirements.
4. Testing and validation
- Analog IC / circuit validations and evaluations
- Programming and debugging of USB Devices
- Use Measurement equipment (multimeters, spectrum analyzers, logic analyzers, oscilloscopes, wave/function generators, Pattern Generators, GPIB Equipments, Machine Temperature, Protocol Analyzer)
- ATE Setup for Memory products using Agilent 93K and Advantest Platforms
5. Process Engineer
- Readjustment and improvement production process
- Production Test time reduction to Improve capacity and assure volume production.
IT- and SOFTWARE SKILLS
Microcontroller : 80C51’s
Tools : Matlab, Microsoft Wave Office, Ladder Diagram, Eclipse, AVRStudio,Xilinx
Programming Languages : VHDL, C , Java programming , Labview 7i, HTML, Visual Basic, Python, Octave, Pascal, Assembly, UML, C-Shell Bus / Protocols : RS232, Ethernet, PCI, USB
OS : Windows NT, Windows 2000,Windows 9x, MSDOS, Linux (Suse, redhat, Ubuntu)
06/2007 - Now - QIMONDA AG. PORTO (PORTUGAL)
Hardware Test Engineer (ATE) – Project Leader
- Management and Coordination responsibility within ATE Vendors Equipment for new Test Cell platform taken into current Graphics Memory Production line.
- Entire test strategy definition in Cooperation with Engineering Centers in Germany (Munich) and North Carolina (Cary) where spent 5 months developing the environment for test in the last project.
- Development and Customization test cell to achieve the same level of company quality and safety requests. Working together with Verigy, Mirae, TSE and ISC to assure the complete and same operational concept currently used in production (Graphic user interface, Logistic Setup and Test Cell functionality).
- Experience using Advantest and Verigy (Agilent 93600) ATE systems for massive production. Setup Configuration, Test Program Installation, Test Program Debug. Systems used for test Memories semiconductors – DDR2, DDR3, XDR, new Buried WL
- Responsible for Process and Product Engineering. Taking actions to optimizing Test Time, Product Performance Monitoring and improving volume production. Working together with Design Centres in USA and Germany to fulfil production site requirements.
03/2005 -05/2007: CHIPIDEA MICROELECTRONICS, LISBON (PORTUGAL)
Hardware Test Engineer
- Test and Characterization/Verification of Chipidea USB IPs (PHY, OTG and ULPI). Perform measurements in Typical and Corner Conditions (Supplies and Temperature).
- Systematically develop Control Software (Labview and VHDL) to operate with test setup and new testchip versions. Verification/Simulation VHDL Code using ModelSim platform. Development of full automatic test system and interface it with the Lab Equipment.
- Use Python script language to improve test timing setup, recording data in SQL Database to analyse data afterwards
- Very familiar with test equipment used for measurements: power meters, signal generators, spectrum analyzers, network analyzers, voltage/current meters, Pattern Generators, Digital Tektronix Oscilloscopes. - Prepare and deliver client reports either for technical or administrative purposes.
- Customer Support. This support is done by phone or in site, which requires my presence in client facilities. - Prepare devices to Certification. Run all Certification Tests.
- Analyse Interoperability and Electrical signals in USB, accordingly with UTMI+ Specification.
- Capability to Test and Debug several USB Devices such as, ULPI, USB Host Controllers, USB Hub Controllers and USB Peripheral Devices.
- Develop Demo Boards Schematic to demonstration. Assembly, configure and test.
- Verify USB Protocol. Understand transaction in Debug Mode
- Tools: Labview Software, C language, Python, USB Organization Tools (Compliance tools and Debug tools), Xilinx ISE Foundation (Using ModelSim in Simulation), Protocol Analyzer Software Tool, Pattern Generator Tools
01/2004-02/2005 : EDISOFT S.A, LISBON (PORTUGAL)
Software Test Engineer
- Participation on GALILEO project (European GPS) with some partnerships cooperation all over the world and essentially with ESA (European Space Agency).
- Research and Development of Technical Requirements for the Integrated Logistic Support (ILS), which has the main goal to assure since the first stage of the project the integration of various support elements in order to optimise system capabilities.
- Perform assessment in several Integrated Logistic Tools available in market which could assure GALILEO needs in terms of Reliability, Availability, Maintainability and Testability.
- Architecture design and definition of the Ground Control System in Galileo Phase C0.
- Participation on PCOS project (Development of a Parallel Constellation Simulator) applying the parallel processing technology in flying satellite and very useful to perform tasks with distributed operating systems. Using Matlab, Java Programming and GridSphere technology.
- Tools: J2EE (Java Programming), Matlab, Visual Basic, Octave (Linux Matlab), JUnit (Battery tests) XML, Gridsphere Technology, Eclipse (IDE), UML, Doxigen
03/2003-12/2003 (9 Months): DELPHI – AUTOMOTIVE SYSTEMS, LISBON (PORTUGAL)
Sensors and Actuators Project:
- Readjustment and improvement production process. Technical management and product definition in cooperation with Mexico and Luxembourg Technical Centre.
- Programming Omron industrial controllers and Digital Displays using Ladder diagram language for PLCs.
- Reduce Product cost, managing with Product Engineers to change product raw material, reallocate suppliers, re-design the final product or change production line Layout.
- Tools: Ladder Diagram, Programming Marsilli Winding Machines (Specific Language)
05/2005 – 05/2006 Post-grade in Entrepreneurial and Enterprise Creation in University of Aveiro – Aveiro.
1996-2003 Degree in Electronics and Telecommunications Engineering - University of Aveiro
Thesis was about “Space/Temporal Study of the Channel of Propagation Radio”, Introduced in the thematic option of the Telecommunications Systems in the specializing of Mobile Communications area, under the supervision of Prof. Dr. Armando Rocha. The goal of this project was to develop software to have the control of synthetic antennas array, which have been implemented and simulated algorithms and methods in order to characterize the propagation channel. Project developed using GUI for Matlab.
- 03/2009 “Lean 6 Sigma”, Qimonda internal training
- 03/2009 “8D System - Methodology”, Qimonda internal training
- 01/2009 “Deviation Management”, Qimonda internal training.
- 06/2008 “Shell Programming for System Administrator (SA-245)”, SUN Microsystems.
- 05/2008 “CMOS Circuit Design with Emphasis on MOS Memories”, Prof. Kurt Hoffman from University Bundeswehr München. 06/2007 “High Speed Digital Test Techniques” , Prof. Doutor Wolfgang Maichen da Teradyne Inc.
- Portuguese : Mother tongue (Speaking and Written)
- Spanish : Mother tongue (Resident in Venezuela during 8 years)
- English Fluent (Speaking and Written)
- French : Reasonable (Speaking and Written)