To work in a learning atmosphere where I can evolve into a source of inspiration and guidance and thereby contributing to the development of my company and myself as well in research areas which would be vital for the future
PROFESSIONAL EXPERIENCE:
* Engineer (On Board Data Handling) , at ST Electronics, Satellite Systems Pte Ltd, Singapore from March 2011 to present. Working on research, development, design implementation of on board data handling hardware, on board solid state recorders and on board CAN networks. Work involves design of radiation tolerant, mission critical and high performance digital hardware and FPGA design for earth observing satellites.
* Worked in Xilinx Asia Pacific as a Test Development Engineer in Product Management Group. Dealing with Virtex 5 family of FPGAs and the entire CPLD product line for test development, yield improvement and test time reduction on Verigy 93K, Credence and Versatest platforms from August 2010 to March 2011.
* Worked in Siemens Building Technologies Private Limited as an Embedded Engineer(Research and Development), from July 2008 to July 2009
* Work involved embedded firmware development for ARM9, ARM7, Zilog architectures, CPLD programming, Analog and digital circuit design, ORCAD, Layout design, Firmware and front end development.
* Developed extremely efficient power supply modules ,load circuits, relay boards for Siemens
* Designed and developed the front end interface using Visual Studio, firmware, test codes and procedures for Siemens products and functional test fixtures.
Responsibilities at ST Electronics, Satellite Systems Pte Ltd (Singapore)
* Design, development and research on mission critical, high performance and high capacity on-board computers, on-board data recorders.
* Working on fault tolerant and radiation tolerant processors and FPGA architectures with VHDL. Designs based on LEON and AMBA architectures.
* Implementation of CAN, LVDS, RS485, RS422, Spacewire standards in hardware.
* Proficient use EDA tools like Mentor Graphics Expedition, HDL Designer.
* Practising and implementing an entire cycle of requirements definition and collection, requirement reviews, prototyping, design reviews, hardware development, testing and qualification processes.
* Work involves interactions with several mechanical, thermal teams and vendors.
* Identification and testing of potential and new technologies.
Responsibilities at Xilinx Asia Pacific (Singapore)
* Design and develop test software to perform the wafer level and final testing of Xilinx FPGAs and CPLD families.
* Working on several ATE platforms like Credence, Versatest, Verigy 93k.
* Analyse and review FPGA architectures to isolate faults and customer complaints
* Analyse and support new program development based on customised customer requirement specifications.
* Develop and maintain Perl scripts for automation of test programs and pattern compilation.
Project 1 -Siemens Building Technologies - Pondicherry (India)
Environment
ATE Development
Actions / Responsibilities
Performed study and analysis of the electronic hardware, source code of several products of Siemens in safety, security and access control domains. The products were ARM and Zilog based. My job was to develop test firmware, test specifications for the Device under Test. The testing platform was an ARM based board and I was involved the hardware design of the testing platforms and related circuits like the power supply modules, relay boards and programming interfaces, front end software for the HCI. Performed the documentation and provided support for the use of the testers in factory environment of Siemens. Maintained and released regular firmware updates for the products.
Technical Environment
C, VC++, MFC, ARM, Zilog, Quartus, CPLD, ORCAD
Duration
9 Months
Project 2 -Siemens Building Technologies Research and Development- Chennai (India), Dublin (Ireland)
Environment
Support, up gradation and maintenance of products in safety, security and access control
Actions / Responsibilities
Perform literature review and survey on processors, interface chips, DFT, documentation, design and development of functional test procedures and specifications. Analysis of existing firmware and development of new firmware and software for porting constantly updated designs. Provided support and consultation for the use of the embedded equipment to the technical staff in India and Ireland.
Technical Environment
C, VC++, MFC, ARM, Zilog, Quartus, CPLD, ORCAD
Duration
11 months
Project 3 -Siemens Building Technologies Research and Development- Chennai (India), Dublin (Ireland)
Environment
Research and Development activities
Actions / Responsibilities
Literature review and survey on several processor architectures like ARM7, ARM9, Cortex and Zilog. Trying out and getting familiar in the latest embedded tools like Allegro Preliminary work on the development of a JTAG based test system for Siemens products
ACADEMIC QUALIFICATIONS:
* Masters Degree at Nanyang Technological University, Singapore specializing in Embedded Systems (CGPA 3.98 upon 5) in 2010.
* Bachelor of Engineering in Electronics and Communication Engineering, Sri Sairam Engineering College,(Anna University) with 80.00% aggregate in 2008.
* 12th std in Devanathan Higher Secondary School, Chennai, with 93.33% in the year 2004.
* Standard 10 CBSE in Srimathi Sundaravalli Memorial School with 92.4% in the year 2002(School topper)
TECHNICAL SKILLS:
* VHDL programming
* AMBA, LEON based FPGA design
* Mentor Graphics EDA tools
* ARM embedded programming.
* QNX RTOS, Embedded Linux based device drivers
* Embedded system design using Cypress PSOC
* Digital design using Verilog
* PIC Programming using MikroC
* Basics of C
* ALP for 8085,8051
* Circuit design using Proteus
* Circuit design using ORCAD
* PCB Design tools
* FPGA using QUARTUS
* Front end design using Visual Studio
CO-CURRICULAR ACTIVITIES: PAPER PRESENTATION:
* Presented technical papers at IIT Madras ,NIT Trichy , Anna University and several other colleges .
* Presented the paper “Smart Glove” in the “International Conference of Ergonomists”, held in Bangalore, India.
* The paper has been selected for presentation in a number of International Conferences.
* Achievements of the project ‘Smart Glove’ cited in leading Tamil Daily Dinamalar.
ROBOTICS:
* Designed and fabricated robots for the robotics competition at NIT Trichy and Anna University and colleges all over India.
ACADEMIC PROJECTS:
* Working on “Rapidly deployable robotics systems for volcano monitoring”.
* Working on development of a state of art infusion pump with QNX RTOS as a part of coursework.
* The Smart Glove project has won prizes in project presentation event in many national level technical symposiums.
* “Smart glove” has won the best student project award of the ECE Department of Sri Sai Ram Engineering College.
* O.e of the 50 Semi Finalists from all over the world in Microsoft Dare To Dream Different project contest.
WORKSHOPS AND INPLANT TRAININGS:
* INVOBOT Robotics Workshop conducted in Loyola College.
* Inplant training in BSNL RGMTTC.
* Inplant training in MINDSTORM GLOBAL TECHNOLOGIES, Chennai
* STTP on KNOWLEDGE MANAGEMENT.
LEADERSHIP QUALITIES:
* Student Chairman ,Placement Co-ordinator ,Events Co-ordinator and Secretary of the ECE Department, Sri Sai Ram Engineering College
* Troop leader for Chatrabathi Sivaji Scout Troop (100 members) in school.
EXTRACURRICULAR ACTIVITIES:
* Won in over 25 colleges in dumbc ,adzap and quiz competitions.
SPORTS:
* Winner of the intra collegiate Kabaddi cup in 2007,2008 .
* Captain of the kabaddi team,active participant in volleyball,cricket,athletics and shuttle.
INTERESTS:
Robotics, practical electronics, embedded systems, presentations and seminars.
REFERENCES:
1) Mr. Raja Balakrishnan
General Manager (Research and Development)
Siemens Building Technologies Pvt Ltd, Chennai, India
Email id - raja.balakrishnan(at)europlex.in
2) Mr. Stephen Sudhakar
Vice President (HR)
Siemens Building Technologies Pvt Ltd, Chennai, India
Email id - stephen.sudhakar(at)sbtdats.com
3) Mr. Satya Narayanan
Associate Manager (Research and Development)
Siemens SBT
Email id - satya.vc(at)europlex.in
PERSONAL PROFILE
DOB : 04/08/1986
Marital status : Married
Languages Known : English, Tamil,Telugu,Hindi
Visa Status : Student Pass
Nationality : Indian
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