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Wed, 15 Aug 2018 22:55:18 +0000
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Wed, 15 Aug 2018 18:13:20 +0000
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Tue, 14 Aug 2018 23:33:39 +0000
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Tue, 14 Aug 2018 22:04:46 +0000
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Tue, 14 Aug 2018 21:57:09 +0000
The Pentagon's Joint Oversight Requirements Council will be briefed this fall on potential solutions to a major national security vulnerability: hypersonic weapons that fly into space at supersonic speeds and descend back down to Earth directly on top of targets. SpaceNews.com
Tue, 14 Aug 2018 13:42:54 +0000
Chinese private launch vehicle maker OneSpace has secured $43.6 million in Series B financing as the company looks to its first orbital launch near the end of 2018. SpaceNews.com
Tue, 14 Aug 2018 00:32:25 +0000
Exos Aerospace, a Texas company developing a reusable suborbital rocket, now plans to carry out a first flight of its vehicle in late August as it sets its sights on a follow-on orbital vehicle. SpaceNews.com
Mon, 13 Aug 2018 19:50:09 +0000
Viasat is still working on a medium-Earth-orbit satellite constellation idea revealed almost two years ago, but has not finalized what that system would look like, Mark Dankberg, CEO of Viasat, said Aug. 9. SpaceNews.com
Mon, 13 Aug 2018 03:47:45 +0000
At the annual SMI MilSatCom Conference in 2017, Army Major General Pete Gallagher, former CENTCOM/J6, shared a vignette about U.S. forces fighting ISIS in the CENTCOM Area of Responsibility. SpaceNews.com
Sun, 12 Aug 2018 19:19:58 +0000
Griffin: "The bumper sticker version of my job is that I don’t have anything to do with anything that the Defense Department is currently buying. " SpaceNews.com
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    Personal information
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    Contact information
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    Candidate Profile
     Date Submitted:17-07-2012
     Last Modified:17-07-2012 (09:10)
    Job information
     Current job:Senior Systems & Test Engineer
     Employment Term:Either
     Job location:US only
     Date available:immediately
     Industry:Satellite Manufacturers and Subcontractors, , , Launch Systems, Consulting/Engineering Services
     KeywordsSubsystems Engr Systems Engr Test Engr
    CV

    PROFILE:

    Experienced & Versatile Digital & RF System Architecture, Subsystems Design & Development, Integration, Test & Sell-off Engineer (with MSEE & Active TOP SECRET & SCI (with CI POLY) Clearances) Responsible for Successful Implementation of Advanced Technology Projects involving Payload, Avionics, Sensors, Networks, Crypto & Telecommunications Electronics across Complete Life-Cycle in both Commercial & Aerospace Industries.

    SKILLS:

    *Proposal, Design, Analysis, Simulation, Prototype, Integration, Test, Sell-off

    *Satellites, Payloads, Avionics, RADAR, Sensors, Crypto, COMSEC, CMD & TLM, Networks

    *PC-based Tools:  DOORS, MATLAB, SIMULINK, SPW, LABVIEW, CAIV, Office 2010

    *Technical Writing, Reports, Specifications, ECPs, Briefings, RFQs, SOWs, CDRLs

    *Pro-Active Team Player with Excellent Oral & Written Communication Skills

    *Aggressive Subcontractor & Vendor Technical & Management Approach

    PROFESSIONAL EXPERIENCE:

    12/11 to Present:  ROCKWELL-COLLINS (RC)-COMMERCIAL AVIONICS DIV       Tustin, CA

    (Contract; Project Funding Dwindling)

    Senior Systems & Test Engineer Responsible for Requirements Flowdown (using DOORS) & Development of Flight Control Avionics for Next-Generation Commercial Aircraft:

    *Employed DOORS to Baseline & Update LRUs’ Mechanical & Electrical Requirements

    *Incorporated Latest FAA Certification Standards (DO-160, DO-278 & ARINC-429)

    *Reviewed Applicable Customer Engr Coordination Memos (ECMs) into Subsystem Spec

     

    05/10 to 12/11:  SPACE SYSTEMS/LORAL (SS/L) (SATELLITE OEM)                Palo Alto, CA

    (Direct; Voluntary Separation When Local Contract Employment (with RC) Arose)

     

    Senior Systems & Test Engineer Responsible for Design, Development & Test Planning for Broadband Multi-Band (C, Ku & Ka) GEO RF Broadcast Payloads (for INTELSAT & DIRECTV):

     

    *Developed Key RF Payload Performance Budgets (G/T, EIRP, Spurs, Gain/Loss, EMI/EMC)

    *Generated “Bottoms-up” Key Payload Size, Weight & Power (SWaP) Estimates

    *Baselined & Maintained Payload Bill of Materials (BOMs) & Coordinated with Subcontractors

    *Coordinated Flight Hardware Unit Deliveries & Assessed Bus Integration Schedule Impacts

    *Prepared for & Conducted Several Successful Customer PDRs & CDRs & Related CDRLs

    *Authored & Enhanced SS/L Payload Design Guidelines (for Mentoring Junior Engineers)

     

    03/09 to 05/10:  NORTHROP-GRUMMAN-ISR DIV (formerly TRW-ESL)            San Jose, CA

    (Contract; Program Funding Ended)

     

    Senior Systems Engineer Responsible for Operational Sustainment of Current & Requirements Analysis for Future Upgrades for SIGINT Avionics Payloads & Supporting Ground Stations:

     

    *Performed Requirements Analysis to Flowdown UAV Spec into Payload Spec via DOORS,

    *Refined, Tracked & Resolved Numerous HW & SW Problem Tracking Reports (PTRs),

    *Prepared Technical & Costing Inputs for Several Future O&M Proposal ECPs,

    *Planned & Executed Several Avionics LRU Functional & Environmental Acceptance Tests,

    *Co-authored ELINT Antenna Subsystem SOW for Enhanced Logistics Subcontract Support.

     

    06/08 to 10/08:  TECHNOVATIVE APPLICATIONS, Inc                                                Brea, CA

    (Direct; Lay-off due to Sudden Contract Cutbacks)

     

    Senior Systems Engineer Responsible for K-Band Electronically-Scanning Interferometric RADAR Avionics Subsystem Development & Integration Planning for USN Shipboard Platform:

     

    *Performed Requirements Analysis to Flowdown Customer Spec into RADAR Hardware Spec,

    *Identified & Resolved many Electrical, Mechanical, Thermal & Power Subsystem Interfaces,

    *Generated & Quantified Key Target Engagement Scenarios for Subsystem Acceptance Tests,

    *Pro-actively Identified, Co-ordinated & Resolved Technical & Programmatic IPT Issues,

    *Planned, Prepared & Presented Key Portions of Successful Subsystem HW & SW CDR.   

     

    12/07 to 05/08:  BOEING-INTEGRATED DEFENSE SYSTEMS (IDS)                Long Beach, CA

    (Contract; Project Funding Ended)

     

    Senior Systems Engineer Responsible for Advanced Cargo Transport (C-17A) Avionics Upgrades (eg, UHF Transmitters, GPS Links, 1553A Bus & PowerPC CPUs):

     

    *Employed DOORS (Requirements Flowdown CAE Tool) to Generate & Baseline Several

       LRU Specs from System Spec & Air Vehicle (AV) Segment Spec,

    *Generated & Enhanced Key Acquisition Planning CDRL (Operational Concepts Doc (OCD)),

    *Coordinated LRU Specs, SOWs & RFQs for Vendors’ Qualifications/Down-Selects.

     

    11/03 to 06/07:  NORTHROP-GRUMMAN-SPACE TECH (NGST)             Redondo Beach, CA

    (Direct; Termination awaiting TSAT Contract Award)

     

    Senior Systems Engineer Responsible for Next-Generation Transformational Satellite (TSAT) (Laser, RF & Digital) Payload Spec (PLS) Definition & Development:

     

    *Utilized DOORS to Generate & Baseline PLS from Space-Segment Performance Specs,

    *Coordinated PLS Flowdown to Subsystem Hardware & Software Specs (via DOORS),

    *Reviewed, Identified & Incorporated Applicable Change Requests (CRs) into PLS,

    *Supported Laser, RF & Digital Payload Subsystem Requirements Reviews (SRRs).   

     

    Previously, Senior Subsystems & Systems Engineer Responsible for V-Band (60 GHz) Crosslink Subsystem (RF & Digital) Development (portion of AEHF Satellite Payload):

     

    *Coordinated & Published Crosslink Subsystem CDR Agenda & Briefing Book.

    *Expanded Subsystem Operational Command Constraints (CMD/TLM) Document.

    *Planned & Generated S-QPSK MODEM (BER & Transition Density) Test Plan.

    *Updated Crosslink Subsystem Requirements Flow-down (System/Subsystem/Unit).

    *Identified Changes & Errata to Payload Spec & Crosslink Subsystem Spec & ICD.

    *Defined Subsystem Requirements Verification Sell-off Methodologies & Briefings.

    *Executed MODEM Transition Density (Visual BASIC) Simulation Study.

    *Completed & Coordinated Transition Density Engr Change Proposal (ECP) Package.

     

    Also, Assisted in Recruiting within our Communications Systems Center (CSC).

     

    08/02 to 11/03:  SAIC, Inc. (LA-AFB Contractor to GPS MJPO)                          Torrance, CA

    (Direct; Voluntary to Return to TRW/NGST)

     

    Senior Systems Engineer Responsible for Requirements Analysis, Acquisition Planning, Configuration & Data Mgmt for Current Operational & Planned Upgrades within Space, C3 &

    Multi-User Segments of Classified Secondary Payload Portion (NDS) of GPS-IIR/IIF/III Systems:

     

    *Supported (Custom FORTRAN) Modeling of Various Proposed L-Band/K-Band Crosslink & Downlink Optimal Constellation Configurations.

    *Flow-down of Customer Spec (ORD) Into Contractors SOWs, System & Segment Specs.

    *Enhanced Web-Based Management Tool Facilitating Disposition of Various User & C3 & Segment O & M Deficiency Reports (DRs), Action Items & CDRLs.

    *Critique of Contractor Technical & Contractual CDRLs (eg, SOWs, SRSs, RFPs, etc).

    *Participated in Future Implementation Studies (eg, Transformational Communications Architecture, Intelligent Airborne Terminals & Data Fusion with SBIRS).

    *Assisted Various Potential SAIC New Business Opportunities (eg, NASA-JPL).

     

    01/98 to 01/02:  BOEING-SPACE & COMMUNICATIONS               El Segundo & Anaheim, CA

    (Direct; Lay-off due to IR&D Cutbacks)

     

    Senior Embedded Subsystem Engineer Responsible for IR&D Multi-PowerPC (G4)-based Software-Defined Radio (SDR) (JTRS) Avionics Subsystem & Prototype Development Projects:

     

    * Employed DOORS to Flow-down Customer Requirements (JORD) into Prototype & Flight RF & Digital SDR Terminal Performance Specs,

    * Wrote SOWs, RFQs, Technical Specs & Qualified Key Vendors for COTS Hardware:

      1) 21-slot COMSEC Chassis Prototype (with CompactPCI Bridged Backplane),

      2) Quad-G4 (PowerPC with ALTIVEC) Digital MODEM DSP Cards,

      3) G3 (PowerPC) RED & BLACK "System Slot" Cards,

      4) Two-Slot RED/BLACK COMSEC Bridge Module.

    * Generated Hardware/Software Interface & Test Specs for Custom-Built Hardware:

      1) SAASM (Secure GPS)-based 10-MHz LO & 1-pps Timing Card (with FPGA),

      2) 33-MHz-BW RF Transceiver Card (with FPGA-based 100 MB/sec (RapidIO Bus) DSP PMC module).

    * Determined Following Digital Interface Design Aspects of Custom Timing Card:

    1)    GPS, 1-pps System & MODEM Interrupts, 10 MHz & CompactPCI Inputs/Outputs,

    2)    CompactPCI Backplane Address Configuration Memory Space Definitions.

    * Worked with Selected Hardware Vendors on Enhancing Key Aspects of Their

        Respective DSP Cards (eg, Technology Roadmap, Board Support Package (BSP) FFT Benchmarks & DSP Libraries, Embedded SDRAM & Flash Sizings, Current Availability & Pricing & Future Ruggedized Configurations).

    * Critiqued Embedded Software (CORBA-based) Requirements & Interface Specs

    * Supported SDR Prototype Migration & Integration (into Various Multi-Channel Airborne Configurations) Study & Formulated Cost Projections.

    * Identified & Procured RF & Digital ATE (including CompactPCI Bus Analyzer, Spectrum Analyzer & DSO) for Prototype Integration & Test.

    * Defined RF & Digital Requirements for SDR 802.11-based Network Testbed.

    * Provided Key Customer & Vendor Technical, Cost & Schedule Coordination.

    * Proposed & Conducted Customer Demos of SDR Prototype & Avionics Hardware.

     

    Also Supported EHF SDR Follow-on (FAB-T) Prototype Definition & Fabrication, plus Facilitated Fiber Optics & LAN Upgrades in SDR & Networks Integration Lab.

     

    Previously, Lead Payload Subsystems Engineer Responsible for RF (Generation & Timing) Subsystem Development of Prototype & Flight (L-Band & C-Band) (TDMA & GSM) Payload for Advanced Digital PCS Satellite System (THURAYA):

     

    * Performed Flow-down of Payload Requirements to SOW & RF Subsystem Spec.

    * Designed Subsystem Architecture (including Redundancy, CMD & TLM Interfaces).

    * Utilized MATLAB & EXCEL to Derive Subsystem's Key Performance Budgets (Phase Noise, RF Gain & Phase Stability, VSWR & IB/OOB Spurious Emissions).

    * Wrote Subsystem Functional, Interface, Test Specs, plus Training Documents.

    * Generated PLL, Synthesizer & OCXO Flight Unit Performance Mini-Specs.

    * Critiqued PLL, Synthesizer & OCXO Flight Unit Design Reviews (PDR & CDR), Worst-Case & Failure Modes Analyses (WCA & FMEA) & Unit Sell-offs.

    * Worked with Parts Engrs to Create & Release New 2:8 Hybrid Microwave Spec.

    * Planned & Conducted Unit & Subsystem Risk-Reduction Engineering Model (EM) EMI/EMC Testing, plus Unit & Subsystem Single-Event Upset (SEU) Analyses.

    * Supported Extensive Subsystem & Payload RF & Digital Integration & Testing.

     

    1994 to 2002:  DeVRY INSTITUTE OF TECHNOLOGY                   Pomona & Long Beach, CA

    (Part-time; Post-9/11-Lay-off)

     

    Adjunct Professor Responsible for Teaching, Updating & Enhancing Electronics Degree Program's Senior-Level Courses & PC-Integrated Labs (Employing PSPICE, WINBREADBOARD, LABVIEW & MATLAB):

     

    * Digital Logic (ALS, PECL, CMOS, LVDS, LVTTL, PAL, CPLD, FPGA, ASIC),

    * Microprocessors (8085A & Pentium, Assembly Language, ISA & PCI Busses),

    * Digital Communications (RS-232, RS-485, UART, FSK, QPSK, QAM, Coding, Eb/No),

    * Networks (LAN, WAN, PSTN, Ethernet, TCP/IP, Client/Server, HTML, HTTP).

     

    Implemented Senior Research Report & Presentation Requiring Graduating Students to Investigate Chosen Topic from Leading Communications & Electronics Technologies.

     

    1996 to 1998:  RESEARCH & DEVELOPMENT LABS (RDL)                           Culver City, CA

    (Direct; Voluntary Separation to Join Boeing)

     

    Lead Hardware & Subsystems Engineer Responsible for Two IR&D Projects:

     

    1)  622 Mbps Digital & Fiber Optics Optical CDMA Transceiver Prototype:

    * Modified COTS Multi-Channel NTSC Video & Audio Encoder & Multiplexer Hardware.

    * Designed "V-pi" (3-Vp-p into 25-ohms) Optical Modulator Interface Circuitry.

    * Specified Wideband Amps & Balanced (Optical) Receiver Hardware.

    * Identified & Procured Digital & RF Test Equipment (BERT, DSO & Bias-Ts). 

    * Planned & Conducted Multi-Channel Video & BER Testing & Customer Demos.

    * Supported Various Product Marketing & Venture Capital (VC) Partnerships.

    * Performed Producibility Analyses for Design Migration to Viable Commercial Product.

     

    2)  28 GHz Broadband Wireless (LMDS) Multi-Channel Transceiver Prototype:

    * Refined Transceiver Architecture (Direct FM into GUNN Oscillator)

    * Identified & Procured RF & Digital RF & Digital Test Equipment.

    * Performed Multi-Channel Video, BER & Ethernet Testing.

    * Investigated Migrating Design to Viable Commercial Product. 

     

    Also Conducted Hardware Feasibility Study of Proposed LightSat RADAR (LightSAR) & Supported Classified Payload Proposal.

     

    1995 to 1996:  MYKOTRONX, INC.                           Torrance, CA

    (Contract; Project Funding Ended)

     

    Systems Engineer Responsible for Two New COMSEC Product (PCMCIA ASIC-based Encryption Card (KRYPTON) & KG-227 Processor Flight Slice) Development Projects:

     

    * Performed Products’ Requirements Analyses.

    * Generated KRYPTON (ARM6-based) ASIC Functional & Interface Document.

    * Wrote Products’ Functional Specs & Acceptance Test Procedures (ATPs).

    * Supported Worst-Case Timing Analyses.

    * Prepared & Conducted Key Design Reviews (SRR, PDR, CDR & MRR).

    * Completed COMSEC Failure Analyses & NSA Certification Docs (FIPS).

     

    1989 to 1995:  TWO LA-AFB DMSP SPO CONTRACTORS                         El Segundo, CA

    (Direct; Lay-offs due to Consecutive Field Offices Closing)

     

    Systems Engineer Responsible for Systems Engineering (plus Config & Data Mgmt) for Current Operational & Planned Upgrades within Space, C3 & Multi-User Segments of Multi-LEO Remote Sensing Satellite (S-Band & UHF) System (DMSP):

     

    * Proposed & Conducted Several Implementation Studies:

    1)    Integration of Embedded COMSEC ("Lightweight Decryption Unit (LDU)") & Phased-Array Antenna into New Small Tactical Terminal (STT),

    2) New Spectrally-Efficient STT Downlink Modulation Implementation (OQPSK),

    3) Titan ELV Upgrade Interface Requirements & Integration,

    4) Enhanced Microwave Sensors (with New Firmware Uplink Capability),

    5) AFSCN 10-kbps Command (SGLS) Uplink Upgrade,

    6) Embedded GPS Receiver Payload Upgrade,

    7) Over-the-Air Rekeyable (OTAR) Payload COMSEC Encryption Unit Upgrade,

    8) Rad-Hard Payload Survivability Assessment & Recommendations.

    * Generated Proposed S-Band & UHF Link Budgets for New STT Downlinks.

    * Wrote & Maintained DMSP Test & Evaluation Master Plan (TEMP).

    * Formulated COMSEC (EKMS) Concepts Of Operation (CONOPS) for New STT.

    * Technical & Implementation Coordination of SOWs, ECPs, PDR, CDR & Test Docs.

    * Participated in Numerous Sensor, Payload & TT&C PDRs, CDRs & TRRs.

    * Co-chaired Interface Control (ICWG) & STT Downlink Upgrade Working Groups.

    * Provided Early Technical & Program Transition of 5D-3 DMSP to NPOESS.

     

    Promoted to Systems Engineering Section Head & Recruited for Engineering Staff.

     

    1988 to 1989:  NASA-JET PROPULSION LABORATORY (JPL)                   Pasadena, CA

    (Contract; Program Funding Ended)

     

    Project Engineer (JPL Contractor) Responsible for COMSEC Telephone (STU-III) Integration into JPL (L-Band) Mobile Satellite Experiment (MSAT-X):

     

    * Conducted MSAT-X & STU-III Requirements & Interface Analyses.

    * Designed & Built MSAT-X-to-STU-III Digital Telephony Interface Hardware.

    * Conceived Set of Progressive Full-Duplex Hardware Test Configurations.

    * Wrote Test Plan & Procedures for Rician (Fading Channel) Hardware Tests.

     

    1982 to 1988:  TRW-ELECTRONICS SYSTEMS GROUP (ESG)          Redondo Beach, CA

    (Direct; Large Company-wide Lay-off)

     

    Design Engineer Responsible for LHR Coherent Combiner & Timing Reference Flight Hardware for EHF, SHF, UHF Spread Spectrum Satellite (MILSTAR-LDR) Payload:

     

    * Contributed to Payload Subsystem Technical & Cost Proposals.

    * Performed Payload Requirements Flow-down & Analyses.

    * Wrote Prototype & Flight Digital & RF Hardware, Interface & Test Specs.

    * Designed LHR Coherent Combiner & Data Multiplexer ECL & TTL Hardware Slices.

    * Designed RF/Digital (Differential ECL) & TRANSEC Subsystem Interfaces.

    * Specified Multi-Mode Accumulator & Multi-Port RAM ASICs & DSP Firmware.

    * Performed PCB Digital Design (ALS & CMOS & ASIC Emulation) & Testing.

    * Generated PDR, CDR, MRR & Worst-Case Analyses (WCA) Documentation.

    * Defined & Built ATE to Support Prototype & Flight Hardware Testing.

    * Supported Prototype & Flight Subsystem Hardware Integration & Test.

     

    Also Supported Synthesizer (DDFS) Hardware Upgrade for DSP-14 Satellite Payload, Completed 400 Mbps BPSK, QPSK, QAM & QPR RF & Digital Modulator Re-Design & ATE Testing & Supported Classified Payload Definition & Development.

     

    EDUCATION (Degrees):

    1981:  GEORGE WASHINGTON UNIVERSITY (GWU)                             Washington, DC

    MSEE in Communications Engineering (Minor in Computer Science).  Conducted Graduate Research & Report in Digital Image Processing for Target Enhancement.

     

    VIRGINIATECH                                                                                                Blacksburg, VA

    BSEE in Communications & Computer Engineering.

     

    EDUCATION (Non-Degree):

    2002:  THE RIGHT WAY (CA EDD-Approved Training Center)                      Gardena, CA

    Microsoft Office 2000 (DOS, WINDOWS, WORD, EXCEL, POWERPOINT, ACCESS & OUTLOOK) "Hands-On" Productivity Enhancement Certificate Program.

     

    NGST-Sponsored Classes:  IPv6 Networking Fundamentals

                                                  Introduction to Satellite Tool Kit (STK)

     

    Boeing-Sponsored Classes:  Introduction to MATLAB & SIMULINK

                                                   Software-Defined Radio (SDR) Design

                                                   Programming TMS320xx for DSP Applications

                                                   Cost As An Independent Variable (CAIV)

                                                        ESD Training & Certification (Graded)

     

    SOFTWARE:        MATLAB, SIMULINK, LABVIEW, DOORS, EXCEL, POWERPOINT,

                                     OUTLOOK, DOS, WINDOWS, ACCESS, FRAMEMAKER & eRoom.

     

    TEST EQUIPMENT:    BERT, Digital O-scope (DSO), Spectrum Analyzer, Power  Meter.

     

    PUBLICATIONS:    GWU Graduate Research Report (Digital Image Processing)

                                     Fairchild Technical "White Paper" (Viterbi Coding over Satellite Links)

                                     Numerous Technical & Project Documentation, Including:

                                        SOW, System, Subsystem, Unit, Interface & Test Specs & Briefings.                                

     

    AFFILIATIONS:     IEEE Communications & Computer Societies, AFCEA & INCOSE

     

    CLEARANCES:    Active TOP SECRET (5-Year Update Valid thru 10/2013)

                                     Active SCI (with CI POLY) (5-Year Update Valid thru 10/2013)

                                   Active COMSEC/TRANSEC

                                   Recent CNWDI (DOE)


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