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CV: Digital IC engineer
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Profile |
- 7 years of hands-on technical experience in Digital Electronics design and testing for mixed-signal ASICs and FPGAs for space applications. - 9 years working experience in ESA, FP7 and IST projects, from proposal preparation and feasibility analysis (Phase A) to FM qualification (Phase C/D). - HDL design, verification, synthesis, STA, P&R, custom layout, post-layout verification. - Deep understanding of radiation effects in space ICs, rad-hard design and TID/SEE radiation testing in qualified facilities. - Solid R&D background with publications at international, peer-reviewed journals and conferences. - Documentation in accordance with ECSS (ESA Product Assurance Standards) and space industry standards. |
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Work Experience |
Democritus University of Thrace, Xanthi, Greece 2006-Present: Digital designer, mixed-signal verification and testing at ESA GSTP Project “Essential Telemetry ASIC”. 2005-2007: Mixed-signal verification engineer and tester at ESA collaborative GSTP Project “Pressure Sensor Interface ASIC”. 2004-2005: Feasibility and risk analysis, architecture definition for the digital processing and storage sub-systems at ESA collaborative GSTP Project “Intelligent Camera”. 2003-2005: Embedded systems design engineer at IST collaborative project “Architectures & Methodologies for Dynamic Reconfigurable Logic”. SPACE-ASICS S.A., Athens-Greece 2011-Present: Digital designer, mixed-signal verification and testing at ESA collaborative TRP Project “Pressure Sensor Interface ASIC 2”. 2009-2010: Feasibility and risk analysis, architecture definition for mixed-signal ADCs at ESA GSTP Project “Bank of ADCs for Space Applications”. Athena Research & Innovation Center, Athens-Greece 2012-Present: Test unit development for FP7 collaborative Project “De-orbiting of satellites using solar panels”. Sevenet Sp., Gdansk, Poland 2001: Summer Internship, Networking design and configuration. |
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Education |
2006–Present: PhD in Electrical and Computer Engineering, dissertation (in progress): “Low power digital electronics, for space application mixed-signal ICs: CAN & SpaceWire Protocols”, Democritus University of Thrace, Greece. 2003–2005: MSc in Electrical & Computer Engineering, thesis: “Design and Implementation of a Viterbi decoder for convolutional error-correction codes”, Democritus University of Thrace, Greece. 1998-2003: BSc in Electrical & Computer Engineering, Democritus University of Thrace, Greece. |
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Computer Literacy |
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Languages |
English (fluent, C2 level), Spanish (proficient, C1 level), Greek (native) |
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Honors and Awards |
2005: Greek National Scholarships Institute: Scholarship for best post-graduate (MSc) performance at Democritus University of Thrace, Department of Electrical and Computer Engineering. 2003: Technical Chamber of Greece: Scholarship for best performance during the 5th year of studies at Democritus University of Thrace, Department of Electrical and Computer Engineering. |
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Associations |
2011-present: Social Solidarity Association of Xanthi; administrative council member; food/clothing logistics manager; webpage administrator. 2007-2009: Elected member of the post-graduates council at Electrical & Computer Engineering Department, Democritus University of Thrace. 2004-present: Member of the Technical Chamber of Greece. |
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