Latest Space News
Tue, 14 Aug 2018 13:42:54 +0000
Chinese private launch vehicle maker OneSpace has secured $43.6 million in Series B financing as the company looks to its first orbital launch near the end of 2018. SpaceNews.com
Tue, 14 Aug 2018 00:32:25 +0000
Exos Aerospace, a Texas company developing a reusable suborbital rocket, now plans to carry out a first flight of its vehicle in late August as it sets its sights on a follow-on orbital vehicle. SpaceNews.com
Mon, 13 Aug 2018 19:50:09 +0000
Viasat is still working on a medium-Earth-orbit satellite constellation idea revealed almost two years ago, but has not finalized what that system would look like, Mark Dankberg, CEO of Viasat, said Aug. 9. SpaceNews.com
Mon, 13 Aug 2018 03:47:45 +0000
At the annual SMI MilSatCom Conference in 2017, Army Major General Pete Gallagher, former CENTCOM/J6, shared a vignette about U.S. forces fighting ISIS in the CENTCOM Area of Responsibility. SpaceNews.com
Sun, 12 Aug 2018 19:19:58 +0000
Griffin: "The bumper sticker version of my job is that I don’t have anything to do with anything that the Defense Department is currently buying. " SpaceNews.com
Sun, 12 Aug 2018 08:27:36 +0000
A NASA mission to travel closer to the sun than any previous spacecraft is on its way after a successful launch from Cape Canaveral Aug. 12. SpaceNews.com
Sun, 12 Aug 2018 00:07:38 +0000
Deputy Defense Secretary Patrick Shanahan: “It's going to take some time to work this through the Congress." SpaceNews.com
Fri, 10 Aug 2018 22:16:21 +0000
NASA announced more than 20 contracts valued at $55 million Aug. 8 intended to develop commercial technologies for space exploration as well as study future markets for commercial activities in low Earth orbit. SpaceNews.com
Fri, 10 Aug 2018 02:29:36 +0000
Small satellites that have propulsion systems, but don’t have encrypted commanding systems, pose a small but real threat of being hacked and endangering other satellites, according to a new study. SpaceNews.com
Fri, 10 Aug 2018 02:14:18 +0000
French fleet operator Eutelsat sold a jointly-owned satellite to partner Es’hailSat of Qatar, expanding Es’hailSat’s fleet as the company awaits the launch of its second satellite late this year on a Falcon 9 rocket. SpaceNews.com
Fri, 10 Aug 2018 02:04:16 +0000
Jim Simpson, chief executive of Bermuda-based fleet operator ABS since December, is no longer head of the company. SpaceNews.com
Fri, 10 Aug 2018 00:18:26 +0000
Why was the DoD space reorganization report more than a week late? The White House ordered a few tweaks. SpaceNews.com
Thu, 09 Aug 2018 17:23:23 +0000
A technology using a tiny laser tracker could help resolve one of the major challenges involved with the launching of cubesats: identifying individual satellites after their deployment. SpaceNews.com
Thu, 09 Aug 2018 16:46:12 +0000
The debate is over. The United States will have a Space Force as a separate branch of the military. SpaceNews.com
Thu, 09 Aug 2018 15:04:24 +0000
Interstellar Technologies is developing the main engine for an orbital rocket designed to carry 100 kilograms and slated for a 2020 test flight. SpaceNews.com
Thu, 09 Aug 2018 14:21:18 +0000
Hiber plans to launch its first satellite in October on an Indian PSLV rocket and its second in November on a SpaceX Falcon 9 rocket. SpaceNews.com
Thu, 09 Aug 2018 02:00:15 +0000
French propulsion startup ThrustMe received 2.4 million euros ($2.8 million) from the European Commission to commercialize an electric propulsion system for small satellites. SpaceNews.com
Thu, 09 Aug 2018 01:09:37 +0000
Helios Wire is preparing to launch its first satellite in October on a SpaceX Falcon 9 rocket. SpaceNews.com
Thu, 09 Aug 2018 01:00:44 +0000
EchoStar Chairman Charlie Ergen said analyst missed synergies apparent in an EchoStar-Inmarsat merger, and that the satellite industry needs bigger players to tackle the mammoth global need for connectivity as satellite operator strength shifts from television to broadband. SpaceNews.com
Thu, 09 Aug 2018 00:00:17 +0000
The National Oceanic and Atmospheric Administration’s Commercial Remote Sensing Regulatory Affairs office plans to roll out a tiered approach to evaluating company data-protection plans. SpaceNews.com
More space news...
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  • CV: FPGA Design Engineer - Research Assistant

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:19-05-2013
     Last Modified:19-05-2013 (09:55)
    Job information
     Current job:FPGA Design Engineer - Research Assistant
     Employment Term:Temp/Contract
     Job location:Europe only
     Date available:within a month
     Industry:Consulting/Engineering Services
     KeywordsAn Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques
    CV
    Nationality: Italian
    Born: 5 February 1986
     
    PROFILE:
     
    An Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques and understanding of analogue systems layout design. Eager to learn, develop new skills and enthusiastic, seeking a rewarding position with scope for technical challenge, career progression.
     
    PROFESSIONAL EXPERIENCE:
     
    January 2013 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin - European Space Agency (ESA)
    DRPM ( Dinamically Reconfigurable Processing Module) – Space
     
    Activity
    The main activity aims to develop systems able to mitigate transient hardware failures (SEU) that may occur in space or at high altitude chased strong electro-magnetic radiation. In this regard have been developed different test platform on FPGA.
    • Implementation of uClinux on MicroBlaze platform both with NTFS file system on external Ram
    • Development of Linux drivers for non-standard IPcores
    • Development of reconfigurable system with automatic correction of faults using a Internal Configuration Access Port (ICAP)
    • Development of a system with 2 ports (ICAP)
    • Analysis and testing of Soft Error Mitigation (SEM) controller
    • Development of system with reconfigurable Multi-processor (Dual-MicroBlaze )
    • Development of reconfigurable system with HDMI controller to visually verify the presence of an error and its correction.
     
    December 2011 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin – Pirelli Tyre S.p.A.
    Cyber Tyre – Automotive
     
    Activity
    Development of an emulation test platform on FPGA to validate and test a novel device.
    • Modify HDL (VHDL / Verilog) of the device under test in order to adapt to the platform. Development HDL code for the test platform
    • Analysis of timing, logic synthesis and implementation
    • Firmware development of the MicroBlaze processor to manage the system emulation and data communication to a PC via RS232 serial
    • Data collection and analysis waveforms using scripts in MATLAB
    • Changes to the firmware of 8051 microcontroller 
    • Development of Tcl and bash scripts to automate the system and inject faults in some critical modules of the device and verify the behavior
    • Analysis on CAN bus and FMEA at an early stage
     
    EDUCATION:
     
    Master of Science degree in Electronics Engineering (10/2009 – 11/2011), Grade: 99/110;
    Polytechnic of Turin, Turin – ITALY
    Thesis: “Development and evaluation of innovative techniques for the testing of microprocessors”
    Brief description: 
    * Development of test programs in assembly for the fault coverage of Adder and Register File modules on OpenRISC 1200 microprocessor. The technique used is called MIHST(MIcroprocessor Hardware Self-Test) a hybrid between the Hardware-Based Self-Test and Software-Based Self-Test. The technique consists of using test programs formed by the loop that can be unrolled to be loaded on a BIST module and occupy less space in memory, but at the same time ensuring a high coverage to failures. Check the coverage was verified with TetraMAX.
     
    Relevant projects:
     
    * VHDL model of a DLX, a 32bits RISC processor, finalized to the implementation on the Xilinx FPGA platform.  The architecture was built using the FPGA block RAM for instruction fetch and data memory. The behavioural testing phase consists in the implementation of a pattern research program in assembly language, to measure the effectiveness of hazard prevention techniques implemented and performance of whole architecture.
     
    * MIPS R2000 Compatible FPU with a focus on the floating point multiplier. This module is able to work with single and double precision data according to IEEE754 standard. To meet the requirements (high frequency, high throughput and low latency), an architecture has been designed in VHDL structural language. Has been used an architecture with two parallel multiplication tree, an innovative and efficient rounding module and parallel adder for exponents calculation. With these choices were achieved excellent results in all three required areas.
     
    ERASMUS – Specialization: Embedded Systems (10/2009 – 06/2010)
    ESIGELEC, Saint-Etienne du Rouvray – FRANCE
     
    Bachelor’s Degree in Electronics Engineering (2005 – 2009), Grade: 95/110;
    Polytechnic of Turin, Turin – ITALY
     
    Diploma electrical engineering technician (2000 – 2005), Grade: 100/100;
    I.T.I.S. Othoca, Oristano – ITALY
     
    LANGUAGES AND TECHNOLOGY:
     
    Italian: Native -  English: Fluent (IELTS Vote:5) - French: Fluent
     
    OS: Excellent knowledge Windows XP/7 and Linux Ubuntu/OpenSuse
     
    Programming languages:C, VB.NET, HTML, MATLAB, Simulink, VHDL, Verilog, Assembler, Assembly x86, UML, Bash Scripting,Tcl, LabView
     
    Software skills:  Electronic Tools:  Xilinx Design Suite (ISE, EDK, XSDK, PlanAhead, ISim), 
    Altera (Quartus II, Nios II), Mentor ModelSim, Synopsys Design Compiler, Cadence(IC, NCSim, Pspice, Virtuoso), Eagle PCB, AWR Microwave Office, Codewarrior, Coldfire, µC/OS-II , TetraMAX, Keil
    Design/Video: Autodesk Autocad, Adobe (Acrobat, Photoshop, After Effects, Premier Pro)
    Office: Microsoft Office and Open Office
     
    Instrumentations skills: Digital and analog oscilloscope, multimeter, frequency-meter, signal sources, spectrum analyzer
     
    INTERESTS AND ADDITIONAL NOTES:
     
    Electronics, automotive, aerospace, space, technology, motorbyke, football, IT world, scientific research 
    Willing to travel for business - Driving license tybe B


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