Latest Space News
Thu, 21 Nov 2019 01:39:46 +0000
The first prototype of SpaceX’s next-generation launch system was damaged Nov. 20 during a tanking test, a setback the company claimed would not serious affect their development plans. SpaceNews.com
Wed, 20 Nov 2019 22:53:59 +0000
Rep. Derek Kilmer said commercial geospatial data should be used to supplement imagery from classified sources. SpaceNews.com
Wed, 20 Nov 2019 20:59:57 +0000
NASA plans to issue a call for ideas for a lunar rover that could be used by future crewed missions to the moon and, like many other elements of the Artemis program, be developed in a partnership with industry. SpaceNews.com
Wed, 20 Nov 2019 18:41:36 +0000
As United Launch Alliance prepares for the maiden flight of its Vulcan Centaur rocket, the company no longer has a clear timeline for a major second-stage upgrade.  SpaceNews.com
Wed, 20 Nov 2019 16:52:45 +0000
Feng Yang, Spacety CEO and founder, talked with SpaceNews about his plans for small synthetic aperture radar satellites and the origins of the company at the Space Tech Expo Europe.   SpaceNews.com
Wed, 20 Nov 2019 16:00:47 +0000
China used signals sent from NASA’s Juno probe orbiting Jupiter to test the capabilities of ground stations vital to its deep space ambitions. SpaceNews.com
Wed, 20 Nov 2019 14:49:44 +0000
The European Space Agency is preparing to allocate a few million euros to ensure Vega doesn’t have any repeats of its July launch failure, an agency official said Nov. 20. SpaceNews.com
Wed, 20 Nov 2019 14:39:49 +0000
While the physics associated with getting into orbit have not changed, the people, methods and ways we access and enable space have evolved. Credit the fuel of federal policy changes and innovation environments as the real force multipliers. SpaceNews.com
Wed, 20 Nov 2019 14:02:27 +0000
SpaceX’s plan to slash the cost of space transportation is shaking up the small satellite propulsion market. SpaceNews.com
Wed, 20 Nov 2019 13:02:50 +0000
OHB hopes to have a small launcher capable of sending 200 kilograms to low Earth orbit conduct a first flight by the end of 2021. SpaceNews.com
Wed, 20 Nov 2019 12:12:33 +0000
Commercial spaceports say they need to become more proactive in dealing with public opposition to proposed launch sites through a combination of education and community involvement. SpaceNews.com
Wed, 20 Nov 2019 10:40:05 +0000
Glavkosmos, the commercial subsidiary of Roscosmos, unveiled a web portal Nov. 20 for Russian rocket and space products. SpaceNews.com
Wed, 20 Nov 2019 09:32:22 +0000
The government of Brazil is ready to move into the next phase of efforts to attract commercial launch business to the country with the ratification of an agreement with the United States. SpaceNews.com
Tue, 19 Nov 2019 20:06:30 +0000
The report titled ”Iran Military Power” is part of a Defense Intelligence Agency effort to inform government leaders and the public on major foreign military challenges. SpaceNews.com
Tue, 19 Nov 2019 18:29:10 +0000
At the Space Tech Expo, space agency leaders said artificial intelligence will play key roles in many space programs of the future. SpaceNews.com
Tue, 19 Nov 2019 18:00:53 +0000
Dawn Harms, the former Boeing Satellite Systems International vice president for global sales and marketing, has joined Momentus to serve as chief revenue officer for the In-space transportation startup. SpaceNews.com
Tue, 19 Nov 2019 17:12:26 +0000
Portugal’s newly created space agency is considering a national constellation focused on maritime activity in the Atlantic Ocean.  SpaceNews.com
Tue, 19 Nov 2019 16:27:10 +0000
China Satcom has filed an insurance claim for the loss of a communications satellite after failing to establish contact with the spacecraft. SpaceNews.com
Tue, 19 Nov 2019 15:58:24 +0000
Rather than waiting for international consensus on measures to mitigate the problem of space debris, space agencies and companies should take immediate action, said Jan Woerner, European Space Agency director general. SpaceNews.com
Tue, 19 Nov 2019 12:26:30 +0000
Boeing said Nov. 18 that a report issued last week by NASA’s Office of Inspector General (OIG) regarding the commercial crew program, including claims that the company considered withdrawing from the program, was inaccurate. SpaceNews.com
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  • CV: FPGA Design Engineer - Research Assistant

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:19-05-2013
     Last Modified:19-05-2013 (09:55)
    Job information
     Current job:FPGA Design Engineer - Research Assistant
     Employment Term:Temp/Contract
     Job location:Europe only
     Date available:within a month
     Industry:Consulting/Engineering Services
     KeywordsAn Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques
    CV
    Nationality: Italian
    Born: 5 February 1986
     
    PROFILE:
     
    An Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques and understanding of analogue systems layout design. Eager to learn, develop new skills and enthusiastic, seeking a rewarding position with scope for technical challenge, career progression.
     
    PROFESSIONAL EXPERIENCE:
     
    January 2013 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin - European Space Agency (ESA)
    DRPM ( Dinamically Reconfigurable Processing Module) – Space
     
    Activity
    The main activity aims to develop systems able to mitigate transient hardware failures (SEU) that may occur in space or at high altitude chased strong electro-magnetic radiation. In this regard have been developed different test platform on FPGA.
    • Implementation of uClinux on MicroBlaze platform both with NTFS file system on external Ram
    • Development of Linux drivers for non-standard IPcores
    • Development of reconfigurable system with automatic correction of faults using a Internal Configuration Access Port (ICAP)
    • Development of a system with 2 ports (ICAP)
    • Analysis and testing of Soft Error Mitigation (SEM) controller
    • Development of system with reconfigurable Multi-processor (Dual-MicroBlaze )
    • Development of reconfigurable system with HDMI controller to visually verify the presence of an error and its correction.
     
    December 2011 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin – Pirelli Tyre S.p.A.
    Cyber Tyre – Automotive
     
    Activity
    Development of an emulation test platform on FPGA to validate and test a novel device.
    • Modify HDL (VHDL / Verilog) of the device under test in order to adapt to the platform. Development HDL code for the test platform
    • Analysis of timing, logic synthesis and implementation
    • Firmware development of the MicroBlaze processor to manage the system emulation and data communication to a PC via RS232 serial
    • Data collection and analysis waveforms using scripts in MATLAB
    • Changes to the firmware of 8051 microcontroller 
    • Development of Tcl and bash scripts to automate the system and inject faults in some critical modules of the device and verify the behavior
    • Analysis on CAN bus and FMEA at an early stage
     
    EDUCATION:
     
    Master of Science degree in Electronics Engineering (10/2009 – 11/2011), Grade: 99/110;
    Polytechnic of Turin, Turin – ITALY
    Thesis: “Development and evaluation of innovative techniques for the testing of microprocessors”
    Brief description: 
    * Development of test programs in assembly for the fault coverage of Adder and Register File modules on OpenRISC 1200 microprocessor. The technique used is called MIHST(MIcroprocessor Hardware Self-Test) a hybrid between the Hardware-Based Self-Test and Software-Based Self-Test. The technique consists of using test programs formed by the loop that can be unrolled to be loaded on a BIST module and occupy less space in memory, but at the same time ensuring a high coverage to failures. Check the coverage was verified with TetraMAX.
     
    Relevant projects:
     
    * VHDL model of a DLX, a 32bits RISC processor, finalized to the implementation on the Xilinx FPGA platform.  The architecture was built using the FPGA block RAM for instruction fetch and data memory. The behavioural testing phase consists in the implementation of a pattern research program in assembly language, to measure the effectiveness of hazard prevention techniques implemented and performance of whole architecture.
     
    * MIPS R2000 Compatible FPU with a focus on the floating point multiplier. This module is able to work with single and double precision data according to IEEE754 standard. To meet the requirements (high frequency, high throughput and low latency), an architecture has been designed in VHDL structural language. Has been used an architecture with two parallel multiplication tree, an innovative and efficient rounding module and parallel adder for exponents calculation. With these choices were achieved excellent results in all three required areas.
     
    ERASMUS – Specialization: Embedded Systems (10/2009 – 06/2010)
    ESIGELEC, Saint-Etienne du Rouvray – FRANCE
     
    Bachelor’s Degree in Electronics Engineering (2005 – 2009), Grade: 95/110;
    Polytechnic of Turin, Turin – ITALY
     
    Diploma electrical engineering technician (2000 – 2005), Grade: 100/100;
    I.T.I.S. Othoca, Oristano – ITALY
     
    LANGUAGES AND TECHNOLOGY:
     
    Italian: Native -  English: Fluent (IELTS Vote:5) - French: Fluent
     
    OS: Excellent knowledge Windows XP/7 and Linux Ubuntu/OpenSuse
     
    Programming languages:C, VB.NET, HTML, MATLAB, Simulink, VHDL, Verilog, Assembler, Assembly x86, UML, Bash Scripting,Tcl, LabView
     
    Software skills:  Electronic Tools:  Xilinx Design Suite (ISE, EDK, XSDK, PlanAhead, ISim), 
    Altera (Quartus II, Nios II), Mentor ModelSim, Synopsys Design Compiler, Cadence(IC, NCSim, Pspice, Virtuoso), Eagle PCB, AWR Microwave Office, Codewarrior, Coldfire, µC/OS-II , TetraMAX, Keil
    Design/Video: Autodesk Autocad, Adobe (Acrobat, Photoshop, After Effects, Premier Pro)
    Office: Microsoft Office and Open Office
     
    Instrumentations skills: Digital and analog oscilloscope, multimeter, frequency-meter, signal sources, spectrum analyzer
     
    INTERESTS AND ADDITIONAL NOTES:
     
    Electronics, automotive, aerospace, space, technology, motorbyke, football, IT world, scientific research 
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