Latest Space News
Mon, 18 Jun 2018 13:22:16 +0000
President Trump will sign a new space policy directive June 18 addressing space traffic management issues, closely following the proposed policy that Vice President Pence announced in April. SpaceNews.com
Mon, 18 Jun 2018 08:45:21 +0000
A key senator says he’s keeping an open mind regarding who in the federal government should have responsibility for the oversight of “non-traditional” commercial space activities. SpaceNews.com
Sat, 16 Jun 2018 19:45:35 +0000
The House Appropriations defense subcommittee approved $49.5 million to create a new “program of record for commercial satellite communications." SpaceNews.com
Fri, 15 Jun 2018 20:23:14 +0000
As the National Space Council prepares for its third public meeting, its activities to date have won widespread praise in the space community, even as there is some skepticism about the effectiveness of the council’s advisory group that will soon meet for the first time. SpaceNews.com
Fri, 15 Jun 2018 11:00:25 +0000
A House hearing on the reasons for cost and schedule problems with major NASA programs pointed blame at a wide variety of sources, from the tools used to track programs to the agency’s mindset to Congress itself. SpaceNews.com
Thu, 14 Jun 2018 19:59:03 +0000
Astranis, a startup developing geostationary satellites to offer broadband internet access, plans to equip its MicroGEO spacecraft with Bradford of the Netherland’s high performance green ECAPS thrusters. SpaceNews.com
Thu, 14 Jun 2018 17:56:47 +0000
Oxford Space Systems, a British startup that hopes to compete with space industry giants Harris Corp. and Northrop Grumman in the satellite component business, has raised 6.7 million British pounds ($8.9 million) from investors. SpaceNews.com
Thu, 14 Jun 2018 16:19:42 +0000
Outer space is the last frontier of human exploration. Unfortunately, the glory days of landing men on the moon are now a distant memory. So too are the memories of watching space shuttles rumble to life and roar to space fading away. That is poised to change and America is ready to lead the way. SpaceNews.com
Thu, 14 Jun 2018 14:09:04 +0000
The relay satellite which will facilitate China’s Chang’e-4 lunar far side landing mission late in 2018 has entered its intended halo orbit around Earth-Moon Lagrange point 2. SpaceNews.com
Thu, 14 Jun 2018 10:14:11 +0000
NASA Administrator Jim Bridenstine used a recent speech to lay out not just the recent space policy changes that directly affect NASA activities but other administration efforts that focus more on commercial space. SpaceNews.com
Wed, 13 Jun 2018 22:57:00 +0000
Both chambers want legislation that strengthens the U.S. military space posture, said Thornberry. The House and Senate are “not going to let up in our push to do better in space.” SpaceNews.com
Wed, 13 Jun 2018 21:34:01 +0000
Despite conditions that have deprived the Opportunity Mars rover of solar power, NASA officials said June 13 that they expected the long-lived spacecraft to survive an intense ongoing dust storm. SpaceNews.com
Wed, 13 Jun 2018 19:15:08 +0000
To receive FIRST UP Satcom, a weekly SpaceNews newsletter for satellite and telecom professionals, sign up here. SpaceNews.com
Wed, 13 Jun 2018 18:22:42 +0000
Defense Secretary Jim Mattis told reporters the Pentagon appreciates the congressional focus on space issues and is not being passive about space reforms, although he would like to see further debate on the pros and cons of reorganizing the military. SpaceNews.com
Wed, 13 Jun 2018 03:28:58 +0000
NASA Administrator Jim Bridenstine says he’s pushing to have a current NASA center director and former astronaut be nominated to be his deputy. SpaceNews.com
Tue, 12 Jun 2018 20:39:06 +0000
While Angola’s first telecom satellite, Angosat-1, failed not long after reaching orbit late last year, the sub-Saharan African nation will get a second shot at satellite ownership with the planned 2020 launch of Angosat-2. SpaceNews.com
Tue, 12 Jun 2018 20:21:38 +0000
A fiscal year 2019 spending bill approved by a Senate appropriations subcommittee June 12 offers $21.3 billion for NASA, including funding for several missions slated for cancellation in the administration’s budget request. SpaceNews.com
Tue, 12 Jun 2018 19:34:11 +0000
As the Federal Communications Commission nears a decision on the use of C-band satellite spectrum, it and several other U.S. agencies are weighing a broader strategy for the nation’s spectrum. SpaceNews.com
Tue, 12 Jun 2018 16:46:37 +0000
Sen. David Perdue: China has spent a lot of time and money developing capabilities to attack GPS satellites, jam them or take them off orbit. SpaceNews.com
Tue, 12 Jun 2018 14:54:48 +0000
NASA doesn’t expect to make decisions on how it will carry out a Mars sample return effort until late next year despite recent discoveries that have offered additional evidence that the planet was once, and may still be, habitable. SpaceNews.com
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  • CV: FPGA Design Engineer - Research Assistant

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:19-05-2013
     Last Modified:19-05-2013 (09:55)
    Job information
     Current job:FPGA Design Engineer - Research Assistant
     Employment Term:Temp/Contract
     Job location:Europe only
     Date available:within a month
     Industry:Consulting/Engineering Services
     KeywordsAn Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques
    CV
    Nationality: Italian
    Born: 5 February 1986
     
    PROFILE:
     
    An Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques and understanding of analogue systems layout design. Eager to learn, develop new skills and enthusiastic, seeking a rewarding position with scope for technical challenge, career progression.
     
    PROFESSIONAL EXPERIENCE:
     
    January 2013 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin - European Space Agency (ESA)
    DRPM ( Dinamically Reconfigurable Processing Module) – Space
     
    Activity
    The main activity aims to develop systems able to mitigate transient hardware failures (SEU) that may occur in space or at high altitude chased strong electro-magnetic radiation. In this regard have been developed different test platform on FPGA.
    • Implementation of uClinux on MicroBlaze platform both with NTFS file system on external Ram
    • Development of Linux drivers for non-standard IPcores
    • Development of reconfigurable system with automatic correction of faults using a Internal Configuration Access Port (ICAP)
    • Development of a system with 2 ports (ICAP)
    • Analysis and testing of Soft Error Mitigation (SEM) controller
    • Development of system with reconfigurable Multi-processor (Dual-MicroBlaze )
    • Development of reconfigurable system with HDMI controller to visually verify the presence of an error and its correction.
     
    December 2011 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin – Pirelli Tyre S.p.A.
    Cyber Tyre – Automotive
     
    Activity
    Development of an emulation test platform on FPGA to validate and test a novel device.
    • Modify HDL (VHDL / Verilog) of the device under test in order to adapt to the platform. Development HDL code for the test platform
    • Analysis of timing, logic synthesis and implementation
    • Firmware development of the MicroBlaze processor to manage the system emulation and data communication to a PC via RS232 serial
    • Data collection and analysis waveforms using scripts in MATLAB
    • Changes to the firmware of 8051 microcontroller 
    • Development of Tcl and bash scripts to automate the system and inject faults in some critical modules of the device and verify the behavior
    • Analysis on CAN bus and FMEA at an early stage
     
    EDUCATION:
     
    Master of Science degree in Electronics Engineering (10/2009 – 11/2011), Grade: 99/110;
    Polytechnic of Turin, Turin – ITALY
    Thesis: “Development and evaluation of innovative techniques for the testing of microprocessors”
    Brief description: 
    * Development of test programs in assembly for the fault coverage of Adder and Register File modules on OpenRISC 1200 microprocessor. The technique used is called MIHST(MIcroprocessor Hardware Self-Test) a hybrid between the Hardware-Based Self-Test and Software-Based Self-Test. The technique consists of using test programs formed by the loop that can be unrolled to be loaded on a BIST module and occupy less space in memory, but at the same time ensuring a high coverage to failures. Check the coverage was verified with TetraMAX.
     
    Relevant projects:
     
    * VHDL model of a DLX, a 32bits RISC processor, finalized to the implementation on the Xilinx FPGA platform.  The architecture was built using the FPGA block RAM for instruction fetch and data memory. The behavioural testing phase consists in the implementation of a pattern research program in assembly language, to measure the effectiveness of hazard prevention techniques implemented and performance of whole architecture.
     
    * MIPS R2000 Compatible FPU with a focus on the floating point multiplier. This module is able to work with single and double precision data according to IEEE754 standard. To meet the requirements (high frequency, high throughput and low latency), an architecture has been designed in VHDL structural language. Has been used an architecture with two parallel multiplication tree, an innovative and efficient rounding module and parallel adder for exponents calculation. With these choices were achieved excellent results in all three required areas.
     
    ERASMUS – Specialization: Embedded Systems (10/2009 – 06/2010)
    ESIGELEC, Saint-Etienne du Rouvray – FRANCE
     
    Bachelor’s Degree in Electronics Engineering (2005 – 2009), Grade: 95/110;
    Polytechnic of Turin, Turin – ITALY
     
    Diploma electrical engineering technician (2000 – 2005), Grade: 100/100;
    I.T.I.S. Othoca, Oristano – ITALY
     
    LANGUAGES AND TECHNOLOGY:
     
    Italian: Native -  English: Fluent (IELTS Vote:5) - French: Fluent
     
    OS: Excellent knowledge Windows XP/7 and Linux Ubuntu/OpenSuse
     
    Programming languages:C, VB.NET, HTML, MATLAB, Simulink, VHDL, Verilog, Assembler, Assembly x86, UML, Bash Scripting,Tcl, LabView
     
    Software skills:  Electronic Tools:  Xilinx Design Suite (ISE, EDK, XSDK, PlanAhead, ISim), 
    Altera (Quartus II, Nios II), Mentor ModelSim, Synopsys Design Compiler, Cadence(IC, NCSim, Pspice, Virtuoso), Eagle PCB, AWR Microwave Office, Codewarrior, Coldfire, µC/OS-II , TetraMAX, Keil
    Design/Video: Autodesk Autocad, Adobe (Acrobat, Photoshop, After Effects, Premier Pro)
    Office: Microsoft Office and Open Office
     
    Instrumentations skills: Digital and analog oscilloscope, multimeter, frequency-meter, signal sources, spectrum analyzer
     
    INTERESTS AND ADDITIONAL NOTES:
     
    Electronics, automotive, aerospace, space, technology, motorbyke, football, IT world, scientific research 
    Willing to travel for business - Driving license tybe B


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