Latest Space News
Sat, 20 Oct 2018 04:15:10 +0000
A Mercury-bound science mission from the European and Japanese space agencies began a seven-year journey to the Solar System’s smallest planet Oct. 19 aboard and Ariane 5 rocket. SpaceNews.com
Fri, 19 Oct 2018 22:06:59 +0000
Vector, one of dozens of ventures developing small launch vehicles to serve perceived high demand for small satellite launches, announced Oct. 19 that it closed a $70 million Series B round to move into full operations. SpaceNews.com
Fri, 19 Oct 2018 19:41:19 +0000
Three regional satellite operators with C-band coverage over the United States have complained to U.S. telecom regulators about being left out of a group led by four of the world’s largest satellite operators to arrange a proposed spectrum transfer to the wireless industry. SpaceNews.com
Fri, 19 Oct 2018 18:20:52 +0000
Thornberry's letter to DoD: "It is important for us to understand the benefits and challenges of a full range of options.” SpaceNews.com
Fri, 19 Oct 2018 16:45:34 +0000
François Lombard, who took the helm at Airbus Intelligence in early 2017, is encouraging this type of innovation and partnerships like the ones formed recently with Earth observation constellation operator Planet and Orbital Insight, a geospatial analytics company. SpaceNews.com
Fri, 19 Oct 2018 00:50:39 +0000
As NASA evaluates proposals for commercially developed small lunar landers, the agency is now seeking payloads that could fly on those spacecraft despite concerns from some scientists that they don’t know if their experiments are compatible with those landers. SpaceNews.com
Thu, 18 Oct 2018 17:00:25 +0000
The last mission needed to complete Iridium Communications’ second-generation satellite constellation is scheduled for Dec. 30, Iridium CEO Matt Desch said today. SpaceNews.com
Thu, 18 Oct 2018 08:26:14 +0000
SMM Hamburg, the biennial international maritime conference in Germany Sept. 4-7, attracted not only shipbuilders but also satellite operators eager to offer global communications for autonomous vessels. SpaceNews.com
Wed, 17 Oct 2018 21:44:31 +0000
Between now and when the the Air Force starts buying launch services from new competitors, ULA and SpaceX will be competing “one mission at a time.” SpaceNews.com
Wed, 17 Oct 2018 19:23:01 +0000
To connect the masses, megaconstellations will need mega antennas mega cheap. Antenna makers need mega orders to make that happen. SpaceNews.com
Wed, 17 Oct 2018 19:11:40 +0000
Intelsat invested in Africa Mobile Networks (AMN), a U.K.-headquartered group of companies with telecom infrastructure in Africa, to reach "ultra-rural" parts of the sub-Saharan side of the continent. SpaceNews.com
Wed, 17 Oct 2018 18:37:44 +0000
As the Pentagon moves to stand up a U.S. Space Command and Congress debates whether it makes sense to create a Space Force, a central focus is to defend satellites from orbital weapons that would seek to damage or destroy U.S. assets in space. SpaceNews.com
Wed, 17 Oct 2018 15:27:27 +0000
Small launch vehicle company Rocket Lab announced Oct. 17 that it will build its second launch pad, and first in the United States, at Wallops Island in Virginia. SpaceNews.com
Wed, 17 Oct 2018 07:58:08 +0000
This was ULA’s eighth launch this year, the 131st since the company was formed in 2006, and will be its 50th launch for the U.S. Air Force. SpaceNews.com
Tue, 16 Oct 2018 22:57:26 +0000
A Swedish company with plans for a geostationary communications satellite announced Oct. 16 a contract with SpaceX for a Falcon Heavy launch no earlier than the fourth quarter of 2020. SpaceNews.com
Tue, 16 Oct 2018 20:52:46 +0000
The NASA astronaut who was on the aborted Soyuz mission to the International Space Station says he has “complete confidence” in the Russians despite this launch failure and other problems and looks forward to flying again on the spacecraft. SpaceNews.com
Tue, 16 Oct 2018 19:37:17 +0000
For all the enthusiasm about lunar exploration, and announcements made during the conference, there were far fewer specific details about just how to achieve those goals. SpaceNews.com
Tue, 16 Oct 2018 18:26:57 +0000
ThinKom’s recent collaborations with satellite operators Telesat and SES have the antenna builder jockeying to compete with Viasat, IsoTropic Systems and others in the race to build affordable high-tech antennas that can link with satellite constellations in non-geosynchronous orbits. SpaceNews.com
Mon, 15 Oct 2018 23:40:09 +0000
45th Space Wing Commander Brig. Gen. Schiess: Gen. Raymond “is pushing us to look at ways to be more responsive.” SpaceNews.com
Mon, 15 Oct 2018 23:06:02 +0000
Paul Allen, the billionaire co-founder of Microsoft who backed the winning entry in a suborbital spaceflight competition and later funded development of a massive air-launch system, passed away Oct. 15. SpaceNews.com
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  • CV: FPGA Design Engineer - Research Assistant

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:19-05-2013
     Last Modified:19-05-2013 (09:55)
    Job information
     Current job:FPGA Design Engineer - Research Assistant
     Employment Term:Temp/Contract
     Job location:Europe only
     Date available:within a month
     Industry:Consulting/Engineering Services
     KeywordsAn Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques
    CV
    Nationality: Italian
    Born: 5 February 1986
     
    PROFILE:
     
    An Electronic engineer with 2 years of experience as FPGA Design engineer; reliable, motivated, meticulous, curious and able to work on own initiative or as part of a team. Excellent knowledge of digital design, reliability and validation techniques and understanding of analogue systems layout design. Eager to learn, develop new skills and enthusiastic, seeking a rewarding position with scope for technical challenge, career progression.
     
    PROFESSIONAL EXPERIENCE:
     
    January 2013 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin - European Space Agency (ESA)
    DRPM ( Dinamically Reconfigurable Processing Module) – Space
     
    Activity
    The main activity aims to develop systems able to mitigate transient hardware failures (SEU) that may occur in space or at high altitude chased strong electro-magnetic radiation. In this regard have been developed different test platform on FPGA.
    • Implementation of uClinux on MicroBlaze platform both with NTFS file system on external Ram
    • Development of Linux drivers for non-standard IPcores
    • Development of reconfigurable system with automatic correction of faults using a Internal Configuration Access Port (ICAP)
    • Development of a system with 2 ports (ICAP)
    • Analysis and testing of Soft Error Mitigation (SEM) controller
    • Development of system with reconfigurable Multi-processor (Dual-MicroBlaze )
    • Development of reconfigurable system with HDMI controller to visually verify the presence of an error and its correction.
     
    December 2011 to present
    Research assistant – FPGA Design Engineer
    Polytechnic of Turin – Pirelli Tyre S.p.A.
    Cyber Tyre – Automotive
     
    Activity
    Development of an emulation test platform on FPGA to validate and test a novel device.
    • Modify HDL (VHDL / Verilog) of the device under test in order to adapt to the platform. Development HDL code for the test platform
    • Analysis of timing, logic synthesis and implementation
    • Firmware development of the MicroBlaze processor to manage the system emulation and data communication to a PC via RS232 serial
    • Data collection and analysis waveforms using scripts in MATLAB
    • Changes to the firmware of 8051 microcontroller 
    • Development of Tcl and bash scripts to automate the system and inject faults in some critical modules of the device and verify the behavior
    • Analysis on CAN bus and FMEA at an early stage
     
    EDUCATION:
     
    Master of Science degree in Electronics Engineering (10/2009 – 11/2011), Grade: 99/110;
    Polytechnic of Turin, Turin – ITALY
    Thesis: “Development and evaluation of innovative techniques for the testing of microprocessors”
    Brief description: 
    * Development of test programs in assembly for the fault coverage of Adder and Register File modules on OpenRISC 1200 microprocessor. The technique used is called MIHST(MIcroprocessor Hardware Self-Test) a hybrid between the Hardware-Based Self-Test and Software-Based Self-Test. The technique consists of using test programs formed by the loop that can be unrolled to be loaded on a BIST module and occupy less space in memory, but at the same time ensuring a high coverage to failures. Check the coverage was verified with TetraMAX.
     
    Relevant projects:
     
    * VHDL model of a DLX, a 32bits RISC processor, finalized to the implementation on the Xilinx FPGA platform.  The architecture was built using the FPGA block RAM for instruction fetch and data memory. The behavioural testing phase consists in the implementation of a pattern research program in assembly language, to measure the effectiveness of hazard prevention techniques implemented and performance of whole architecture.
     
    * MIPS R2000 Compatible FPU with a focus on the floating point multiplier. This module is able to work with single and double precision data according to IEEE754 standard. To meet the requirements (high frequency, high throughput and low latency), an architecture has been designed in VHDL structural language. Has been used an architecture with two parallel multiplication tree, an innovative and efficient rounding module and parallel adder for exponents calculation. With these choices were achieved excellent results in all three required areas.
     
    ERASMUS – Specialization: Embedded Systems (10/2009 – 06/2010)
    ESIGELEC, Saint-Etienne du Rouvray – FRANCE
     
    Bachelor’s Degree in Electronics Engineering (2005 – 2009), Grade: 95/110;
    Polytechnic of Turin, Turin – ITALY
     
    Diploma electrical engineering technician (2000 – 2005), Grade: 100/100;
    I.T.I.S. Othoca, Oristano – ITALY
     
    LANGUAGES AND TECHNOLOGY:
     
    Italian: Native -  English: Fluent (IELTS Vote:5) - French: Fluent
     
    OS: Excellent knowledge Windows XP/7 and Linux Ubuntu/OpenSuse
     
    Programming languages:C, VB.NET, HTML, MATLAB, Simulink, VHDL, Verilog, Assembler, Assembly x86, UML, Bash Scripting,Tcl, LabView
     
    Software skills:  Electronic Tools:  Xilinx Design Suite (ISE, EDK, XSDK, PlanAhead, ISim), 
    Altera (Quartus II, Nios II), Mentor ModelSim, Synopsys Design Compiler, Cadence(IC, NCSim, Pspice, Virtuoso), Eagle PCB, AWR Microwave Office, Codewarrior, Coldfire, µC/OS-II , TetraMAX, Keil
    Design/Video: Autodesk Autocad, Adobe (Acrobat, Photoshop, After Effects, Premier Pro)
    Office: Microsoft Office and Open Office
     
    Instrumentations skills: Digital and analog oscilloscope, multimeter, frequency-meter, signal sources, spectrum analyzer
     
    INTERESTS AND ADDITIONAL NOTES:
     
    Electronics, automotive, aerospace, space, technology, motorbyke, football, IT world, scientific research 
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