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Sun, 24 May 2020 01:49:38 +0000
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Sat, 23 May 2020 20:36:35 +0000
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Fri, 22 May 2020 23:05:28 +0000
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Fri, 22 May 2020 15:58:59 +0000
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Fri, 22 May 2020 12:55:39 +0000
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Thu, 21 May 2020 22:56:58 +0000
The U.S. Space Force is asking for changes in the rules that currently are in place for buying new weapon systems. SpaceNews.com
Thu, 21 May 2020 21:55:30 +0000
Satellite imaging companies are embracing long-awaited reforms to commercial remote sensing regulations, although one member of Congress doesn’t think the changes go far enough. SpaceNews.com
Thu, 21 May 2020 20:46:49 +0000
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Thu, 21 May 2020 17:12:00 +0000
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Thu, 21 May 2020 15:30:04 +0000
Preparations for the launch of a SpaceX commercial crew test flight with two NASA astronauts on board are continuing despite the unexpected departure of the head of the agency’s overall human spaceflight program. SpaceNews.com
Thu, 21 May 2020 11:53:09 +0000
The Senate Commerce Committee backed the nomination of Neil Jacobs to be the head of NOAA May 20, despite some lingering concerns by some members. SpaceNews.com
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  • CV: Sr. Project Hardware / Signal Integrity Engineer

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:20-07-2013
     Last Modified:28-07-2013 (08:10)
    Job information
     Current job:Sr. Project Hardware / Signal Integrity Engineer
     Employment Term:Permanent
     Job location:Own country
     Date available:immediately
     Industry:Civil Agencies/International Organizations, Satellite Manufacturers and Subcontractors, Consulting/Engineering Services
     KeywordsElectrical Engineer, Signal Integrity,
    CV

    OBJECTIVE

    Obtain an electrical hardware design position in the Space Industry that will challenge both my technical and creative skills with opportunity for significant career and personal growth through involvement in meaningful projects.

     SUMMARY OF QUALIFICATIONS

    Accomplished Signal Integrity Engineer/Technical Lead providing consistent technical expertise and leadership for continuous advancement of a small, key SI engineering organization supporting a world-wide corporation.

    Established Senior Hardware Project Engineer with recognized expertise in high speed digital design, including:  DDR3/2/1, LVDS, PCIe, SERDES synchronous interfaces, and ARM, PowerPC or other CPU high speed asynchronous interfaces. 

    Demonstrated leadership skills through achievement of cross-organizational collaboration, facilitating team development, sharing insights, mentoring and improving engineering practices to support efficient and innovative developments. 

     

                                                         TECHNICAL / PROJECT LEADERSHIP

    COMPETENCIES

    ACCOMPLISHMENTS

    Leadership,

    Insight,

    Initiative,

    Key Technical Lead initiating & aiding creation of a 6 member Signal Integrity Engineering team currently supporting over 25 high speed developments.  Drive continued growth to further integrate these necessary methodologies through-out a $5 billion global corporation.  

    Advance Technology

    Knowledge sharing

    Advanced SI technology preparing/conducting training classes for six US, Singapore & Japanese development partners, mentoring colleagues and coordinating five in-house expert-led seminars.

    Persuasive, Acquires

       needed resources

    Negotiated capital purchase of software (HyperLynx PI, HFSS) & instrumentation (scopes, TDR/VNA) totaling ~$1.5M to support SI activities for SI team and global engineering community.

    Change agent,

    Cross-cultural teaming

    Supported SI team expansion to India based, in-house design center interviewing candidates, mentoring 3 new hires and adapting workflow. Organized cross-cultural teaming events promoting unified, collaborative project execution.

    Partnership,

    Assertive, Strategic,

    Communication

    Promoted SI team expertise, bringing in 60% of group’s projects.  Provided management with technical input on job complexity, skills matching and project status to balance and prioritize workload.  Established partnerships with 3rd party SI suppliers to help manage surplus SI work.

     

    SIGNAL INTEGRITY ENGINEERING

    COMPETENCIES

    ACCOMPLISHMENTS

    Technical expertise,

    DDR, DDR2, DDR3,  

    Multi-board

    Signal Integrity Lead supporting 4-5 concurrent $2M hardware projects and one $5M ASIC design annually.  Recognized DDR specialist designing embedded DDR1/2/3 circuits for 21 hardware products and 2 ASIC developments.   Extensive board/multi-board/system level experience.

    Ingenuity,

    Process Improvement,

    Incorporated SI simulation methodologies (HyperLynx/ICX/H-Spice) to design in quality and avoid difficult to troubleshoot intermittent problems.  SI engineering practices resulted in reduced overall engineering time and board spins for an annual savings of >$300K. 

    Collaboration,

    Design Reliability

    Increased design efficiency 83% through SI/HW/PCB collaborative creation of a DDR physical re-use block saving 3 months effort.  Utilization of re-use block eased design maintenance improving update efficiency 78%, saving 2 weeks effort per update, while increasing design reliability.

    Innovative,

    Forward Thinking,

    Big Picture

    Recommended ASIC design improvements resulting in feature enhancements incorporated in next generation ASIC designs, including:  a patentable DDR driver auto-impedance-adjust for real-time drift compensation.  And a configurable drive/slew-rate control to universally support low- to high-end applications without the need for discrete termination. 

    Trouble shooting

    skills,  High Speed

    Measurements

    Identified and coordinated resolution of multiple DDR controller issues resulting in either model, silicon or configuration changes.  Acquired and presented simulation/lab data to silicon vendors demonstrating source of differential signaling, ground-bounce or driver mismatch issues.

     

                                                             ELECTRICAL HARDWARE DESIGN

    COMPETENCIES

    ACCOMPLISHMENTS

    Creative,

    Cost Reduction,

    Results Driven,

    Time-to-Market,

    Conceptualized and designed a unique, low profile, low cost, user interface module with embedded buttons and mylar overlay.  New design replaced a 3 module stack; reducing manufacturing time 75% and product cost by 80% while improving reliability and simplifying user installation.  Received special recognition for releasing product at first design revision.  Product promotion appeared in world-wide corporate brochure for its innovation.

    Spurs new ideas/

    solutions/processes,

    Work independently

    Accomplished Lead Project/HW Engineer with several company firsts:  SI lead of first SI organization at Rockwell Automation.  First/only (at that time) sustaining engineer for CompuAdd.  Sole technical contact, supporting/training Texas Instruments European Distribution/Repair Center.  Awarded first patent for Fire Alarm Division of Grinnell/Thorn Automated Systems

    Pioneering, Thorough,

    Quality,

    Designed innovative FPGA test mode to verify integrity of on-chip Error Checking & Correction logic for memory interface fault protection.   This FPGA design was adopted by other products and was later converted to an ASIC.

    Quick learner,

    Originality,

    Perceptive

    Identified and resolved difficult memory soft-error issue on a legacy product.  Demonstrated excellent troubleshooting skills using “out-of-the-box” thinking to devise test platforms which facilitated capture of enough data errors to disseminate the problem.

     

    PATENTS/ INNOVATION AWARDS

    • Awarded a patent for the development of a fault tolerant RS485 communication network including: ground fault detection, data detection and transmission direction control circuitry.  First patent awarded to this company division.
    • Presented an innovation award for development of an FPGA based ECC circuit to correct single-bit and check double-bit memory errors with a self-test mode to verify the integrity of the ECC circuitry itself; implementing an additional layer of protection against Soft Errors and other error phenomenon.
    • Presented an innovation award in recognition of inventiveness and ingenuity demonstrated through development of simulation methodologies and promotion of signal integrity engineering practices in product development.
    • Received multiple outstanding achievement awards for “above and beyond” contributions, including:  improved efficiency in engineering practices, advanced technical contribution, product cost reduction, improved product reliability and team work.

    PROFESSIONALEXPERIENCE

    Sr. Project HW/SI Engineer:

    Rockwell Autmation                         Mayfield Heights, OH

    > 15yrs tenure; experienced HW Designer and SI Technical Lead / specialized high speed design skills.

    Hardware Design Engineer:

    Grinnel Fire Protection Systems Westlake, OH

    Extensive practical engineering experience specifying, designing, testing and sustaining electronic control systems/computers. 

     

     

    Dedicated service with commitment to continual personal and technical improvement for consistent development of quality, innovative products.

     

    Nordson Corporation       Westlake, OH

    Production Engineer:

    CompuAdd Corporation      Austin, TX

     

    Texas Instruments               Austin, TX

    EDUCATION

    B.S.Electrical Engineering:

    Ohio University

    Specialized courses in microcomputers, digital circuit and electronic system design, and programming.

    Additional Training

     

    Pursue continuous technical and personal development through courses, seminars, webinars & trade shows.


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