Latest Space News
Tue, 22 May 2018 00:18:43 +0000
The UN certified Iridium Communications to provide Global Maritime Distress Safety System (GMDSS) services, ending Inmarsat’s monopoly on the internationally required service for ships, Iridium said May 21. SpaceNews.com
Mon, 21 May 2018 18:42:48 +0000
The USSOCOM can now take advantage of commercial innovations by procuring satellite connectivity as a managed service SpaceNews.com
Mon, 21 May 2018 17:08:04 +0000
Israeli fleet operator Spacecom on May 21 announced a contract worth up to $55 million for satellite capacity on its upcoming Amos-17 satellite. SpaceNews.com
Mon, 21 May 2018 12:30:45 +0000
Parsons will be pursuing more Air Force and NASA work, especially in small satellite prototyping and engineering development. SpaceNews.com
Mon, 21 May 2018 12:04:36 +0000
An Orbital ATK Antares rocket successfully launched a Cygnus cargo spacecraft to the International Space Station May 21 on a mission that may be the swan song for the company as an independent entity. SpaceNews.com
Sun, 20 May 2018 19:53:04 +0000
The utility of space sensors has been studied for decades so the Pentagon has plenty of data to draw from. SpaceNews.com
Sun, 20 May 2018 16:45:56 +0000
Striking United Launch Alliance employees will return to work after voting May 19 to accept a revised contract, ending a two-week strike. SpaceNews.com
Fri, 18 May 2018 20:18:02 +0000
As NASA formally requests proposals for studies on the commercialization of low Earth orbit, another study presented at a congressional hearing May 17 concludes commercial space stations are unlikely to be financially viable in the mid-2020s. SpaceNews.com
Fri, 18 May 2018 14:48:14 +0000
Members of a NASA safety panel said May 17 they believed that a SpaceX approach for fueling its Falcon 9 rockets known as “load-and-go” could be used for future commercial crew missions. SpaceNews.com
Fri, 18 May 2018 03:02:18 +0000
As House appropriators approved a spending bill May 17 that partially restores funding for a NASA astrophysics mission slated for cancellation, the agency’s administrator said he was “90 percent” confident that the mission will continue. SpaceNews.com
Thu, 17 May 2018 23:25:08 +0000
Planet hopes to grab market share by offering “guaranteed collection” twice a day. SpaceNews.com
Thu, 17 May 2018 22:42:51 +0000
NASA is dealing with a contamination problem with tubing in part of the core stage of the first Space Launch System vehicle, an issue that could contribute to further delays for its launch. SpaceNews.com
Thu, 17 May 2018 20:27:37 +0000
Nine satellite companies agreed May 17 to donate satellite capacity and equipment to the United Nations, seeking to coordinate their responses to natural disasters. SpaceNews.com
Thu, 17 May 2018 19:45:38 +0000
Nearly 600 members of a union that has been on strike against United Launch Alliance for almost two weeks will vote on a new contract May 19 that would end the labor dispute. SpaceNews.com
Thu, 17 May 2018 17:10:18 +0000
SpaceX and OneWeb, two companies building thousands of satellites for broadband services, both expect to connect billions of the world's least-served to the internet. The two most prominent developers of electronically steered antennas don’t share that aspiration, however. SpaceNews.com
Thu, 17 May 2018 15:43:28 +0000
The new Pentagon-based vice commander of Air Force Space Command, Lt. Gen. David “DT” Thompson, made his first public appearance May 15, 2018, at a Washington Space Business Roundtable luncheon. SpaceNews.com
Thu, 17 May 2018 09:34:13 +0000
Testimony by NASA’s Inspector General at a May 16 hearing provided new support to efforts by two senators to block plans to end funding of the International Space Station in 2025. SpaceNews.com
Wed, 16 May 2018 22:33:57 +0000
A spending bill to be marked up by the House Appropriations Committee would provide some funding for a NASA space telescope proposed for cancellation, but not necessarily enough to keep the mission on schedule. SpaceNews.com
Wed, 16 May 2018 22:13:26 +0000
A British billionaire has invested in a company operating a ground station that has aspirations to support commercial missions beyond Earth orbit. SpaceNews.com
Wed, 16 May 2018 21:52:44 +0000
Todd Harrison, CSIS senior fellow: “With hosted payloads, there are a lot of great opportunities to increase resiliency and capacity.” SpaceNews.com
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  • CV: Radar Systems Engineer

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:21-06-2015
     Last Modified:21-06-2015 (04:56)
    Job information
     Current job:Radar Systems Engineer
     Employment Term:Permanent
     Job location:Europe only
     Date available:immediately
     Industry:
     KeywordsRadar Systems digital signal processing VHDL and FPGA
    CV

    I authorize the treatment of my personal data as per law 13 D.lgs. 196/03 valid in Italy.

     

    CURRICULUM VITAE

    Education

    Ø       Master Degree (1995-2001):

    Electronic Engineering

    Ø       At the:

    Politecnico of Turin,   final mark : 110/110 cum Laude

    Ø       Master Thesis: “Modal Tecniques for the electromagnetic analysis of passive components in ridge waveguides” Rel: Prof. Renato Orta, Prof. Riccardo Tascone, “Politecnico of Turin”.

    Ø       High school:

    o         Scientific License (1990-1995), final mark 60/60.

    Ø       English study

    o        British school, attended for nine years

    o        PET certification with merit

    Languages

    Ø       English:

    Good in reading, writing and conversation;

    Preliminary English Test, University of Cambridge.

    Ø       French: scholastic level

     

    Technical Skills

    Ø  Strong knowledge of Radar Systems and communication systems  (GSM UMTS)

    Ø  Knowledge of System Simulation/Signal Processing techniques and Matlab Language (> 5y)

    Ø  Capability to develop under Simulink environment simulation models for complex systems and functions;

    Ø  Architecture definition of electronic systems and Hardware/software partitioning;

    Ø  Strong knowledge of VHDL language and of Xilinx System Generator Tool for the design of logic circuits and communication interface  (PCI, VME, RocketIO, HotLink) (>7 y);

    Ø  Knowledge of all the design flow for producing programming files for the FPGA starting from RTL-HDL description

    Ø  Knowledge of C language and of the VxWorks environment for the implementation of SW functions for embedded systems

    Ø  Model of proportional navigation based systems;

    Ø  Currently leading the activities of a group made by myself and four other engineers

    Professional

    Experience

    July 2012-Today: Aresys SRL, MILANO

    Qualification:Head of Electronic Developments Area

    Market of operation: Remote Sensing

    Ø          Work Experiences at Aresys:

    o    Leading the development of a Real Time SarRadar Emulator tailored for an UAV paltform. The system is COTS based (Curtiss-Writght and 4DSP) and its purpose is to generate (@IF level) the echos as would been received by a SAR Radar Processor (targeted for UAV SAR) in order to test it in laboratory. The system has been developed for an important non European global player of defense industry.

    o    Built-up of Electronic HW/System Department. During first year of activities the area grew-up fastly and now reached an number of five engineers. Main project involving the area is the development of a low cost and reduced dimensions Radar Sensor and UAV SAR emulator.

    o    Leading the development of an FMCW Radar Sensor. Main sub-activities were (all internal developments):

    §  System Architecture and Design;

    §  System Simulations (Matlab/Simulink);

    §  Software and FPGA/FW developments (VHDL, System Generator, C Language);

    §  Local Oscillator / synthesizer developments;

    §  Power Supply Unit;

    §  Antenna and Transceiver are COTS modules;

    o    Development of a Simulink model for the simulation of the complete physical Layer of GSM communication system

     

    April 2005-June 2012: Elettronica SPA, ROMA

    Qualification:System Architect / Analyst and Digital Designer

    Market of operation: Systems for Radar Electronic Warfare

    Ø          Work Experiences at Elettronica:

    o    Leading an italian founded project for the study and developement of Jamming Codes (special modulations for the deceive of infrared missiles). An important aspect of this project is the development of an engagement simulator (missile-target) to verify effectiveness of codes.

    o    Design at system level and leading developement of the SW for management and allocation of HW resources for a Laser DIRCM system (Direct Infrared Counter Measures)

    o    Design of a simulator of Missile Warning System made of:

    §  HW COTS: Matrox Card for the acquisition and the processing of images, Power PC & VxWorks Curtiss-Wright, Host PC, HW for  MIL-BUS-1553 management

    §  SW for the management of communication, and of MMI interface. SW has been developed partially under Visual Studio partially under WindRiver-workbench environment.

    §  Algo level SW for the Image Processing. Purpose was to analyze captured images in order to extract emitting sources

    o    Algorithmic study and implementation on FPGA, of a firmware aimed to phase goniometry. The developed block estimates azimuth and elevation of the Direction of Arrival of an emission using the measures of phase difference among different channels, provided from a digital receiver. Finally, the block converts the estimations from the local antenna-panel reference, into a fixed reference, knowing the navigation data.

    o        Development of a latest generation Digital Receiver Unit. One of the main challenges was to align four A/D converters of 3Gsps. The hardware used were the boards from VMETRO. In this project I actively worked either at the algo & specification phase or at HDL and SW development. (VHDL and C/VxWorks were the tools I used)  

    o        Algorithmic-Architectural study for a Digital Down Converter, highly reconfigurable, multichannel in band 0-100 MHz, and IF band between 5 KHz e 5 MHz. Implementation of the DDC in Xilinx System Generator and prototypation on FPGA Xilinx Virtex-4.

    o        Rapid Prototyping Methodology: I lead succesfully a pilot project which purpose was to set up and demonstrate the “hardware in the loop” design methodolgy, where the Matlab/Simulink simulator, System Software, System Hardware work toghether according to the following tasks:

    §         Matlab Simulink Simulator: transmits stimuli;

    §         System Sofware: Implements software algos and controls, communicates with the hardware by means of memory mapped registers;

    §         System Hardware: it is the digital architecture of the system (equivalent System Generator /VHDL) ;

    The case study was the digital receiver, the most complex board present in the company. It was emulated on three boards Alpha-Data interconnected using serial links. Original source code was written in VHDL, a system Generator part has been added to it and all has been co-simulated whether in ModelSim environment or in Hardware.

    May 2002 – April 2005at  STMicroelectronics

    Qualification: Digital Architect.

    System of communication UMTS.

    Ø          Interesting Experiences  (all developements are in VHDL):

    o        Research  (in a multisite team) of innovative solutions to the problem of high communication speed for Turbo Codes (from tens to hundreds of Mbps) in particular providing efficient IPs for solving the “interleaver bottleneck”. In the ambit  of this activity I produced a paper that I cite later on.

    o        Study and plementation of the Synopsys Power Methodology, for making estimates on dissipated power from digital circuits, investigating the impact of clock-gating on power consumption.

    o        Partecipation to the developement of a modem for the HSDPA channel of UMTS. It was made by an Inner Modem (based on a MMSE Equalyzer in the frequency domain) and an Outer Modem based on the Turbo Decoder

    o        Architectural study and implementation in VHDL of an FFT – Radix-4 of very small dimensions and variable number of points. The core was at the basis of the MMSE Equalyzer;

    Ø       Prototypation

    o          FPGA: synthesis of components descripted in VHDL for FPGA Xilinx

    o          Post Place and Routesimulations also in Verilog (useful for power estimations) integrating SDF file for delays;

    o        Board: Use of 4DSP, Curtis-Wright, VMETRO, Alpha-Data and Nallatech boards.

     Computer Skills

    Operating Systems: Solaris, Windows user level;

    Programming Languages:

    VHDL, C, Matlab at very high level;

    C++ at superficial level

    Tools:

    Matlab/Simulink/system Generator

    Cadence ncsim, Mentor Modelsim,

    Synopsys design_compiler,

    Simplicity  Synplify Pro,

    Xilinx ISE

    JTAG tools for Desing For Testability

    Conrtanct & Salary

    Full-time 7^CCNL Metalmeccanico

    Salary of 52.000 Euro



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