Latest Space News
Thu, 20 Jun 2019 00:05:39 +0000
DoD sources said Esper is likely to continue to advocate for space investments. SpaceNews.com
Wed, 19 Jun 2019 21:50:03 +0000
Britain’s export credit agency has long discussed more involvement in the satellite industry, but didn’t have any major deals to show for it until now. SpaceNews.com
Wed, 19 Jun 2019 20:58:41 +0000
A new report from the Government Accountability Office found that the prime contractors for the Space Launch System and Orion spacecraft received hundreds of millions of dollars in award fees despite continued issues that will likely lead to further delays in the programs. SpaceNews.com
Wed, 19 Jun 2019 20:30:18 +0000
An agreement reached in the U.S. House of Representatives June 18 could keep the Export Import Bank of the United States open until 2026. SpaceNews.com
Wed, 19 Jun 2019 14:52:11 +0000
Boeing announced June 19 it will move the headquarters of its space division from the Washington, DC area to Florida as a number of its major programs shift from development to operations. SpaceNews.com
Wed, 19 Jun 2019 04:27:31 +0000
Problems with an unnamed component supplier are the reason the first launch of a ViaSat-3 high-throughput satellite won't happen until 2021. SpaceNews.com
Tue, 18 Jun 2019 22:12:01 +0000
An executive order calling for an across-the-board reduction in federal advisory groups could force NASA to shut down several of the committees that support the agency. SpaceNews.com
Tue, 18 Jun 2019 21:16:42 +0000
Gen. Paul Selva: Military forces in the field need “ubiquitous communications” SpaceNews.com
Tue, 18 Jun 2019 19:16:32 +0000
In a letter to President Trump, Stopher said he plans to return to the private sector. SpaceNews.com
Tue, 18 Jun 2019 18:43:15 +0000
Shanahan “has decided not to go forward with his confirmation process so that he can devote more time to his family,” President Trump tweeted. SpaceNews.com
Tue, 18 Jun 2019 15:30:24 +0000
Selling capacity to other satellite operators is now one of Avanti’s main priorities, followed by selling to the U.S. Defense Department, Avanti CEO Kyle Whitehill said in a June 10 financial report. SpaceNews.com
Tue, 18 Jun 2019 13:13:43 +0000
A startup company that plans to develop tankers for refueling satellites has completed a key test of its technology on the International Space Station. SpaceNews.com
Tue, 18 Jun 2019 01:16:13 +0000
The full House is unlikely to make major changes in NASA funding when it takes up an appropriations bill this week, but members will seek changes for two other agencies involved in space issues. SpaceNews.com
Tue, 18 Jun 2019 00:36:35 +0000
RBC Signals, a startup creating a global network of satellite ground stations, aggressively pursuing and beginning to win government business, Ron Faith, RBC Signals president and chief operating officer, told SpaceNews. SpaceNews.com
Mon, 17 Jun 2019 22:50:58 +0000
Kinéis, a subsidiary formed last year by French maritime company CLS, has taken over operation of the Argos hosted payload system, and finalized manufacturing agreements for a constellation of 25 small satellites for Internet of Things connectivity. SpaceNews.com
Mon, 17 Jun 2019 22:33:31 +0000
Senators are taking a new approach to winning passage of a commercial space bill, offering it as an amendment to a defense authorization bill. SpaceNews.com
Mon, 17 Jun 2019 18:46:03 +0000
A new report warns of China’s stealth investments in U.S space companies and the country’s coordinated public-private efforts to dominate markets. SpaceNews.com
Mon, 17 Jun 2019 16:39:29 +0000
Trump’s recent tweet will only sow confusion and complicate the already herculean task of building a permanent, manned American presence in the space beyond Earth orb SpaceNews.com
Mon, 17 Jun 2019 16:03:17 +0000
Saturn Satellite Networks will build satellites ranging from 600 kilograms to 1,700 kilograms, and already has a customer order, Tom Choi, Saturn’s executive chairman, told SpaceNews. SpaceNews.com
Mon, 17 Jun 2019 12:00:03 +0000
Peraton CEO and chairman Stu Shea said the acquisition of Solers will strengthen the company's national security space portfolio. SpaceNews.com
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  • CV: Radar Systems Engineer

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:21-06-2015
     Last Modified:21-06-2015 (04:56)
    Job information
     Current job:Radar Systems Engineer
     Employment Term:Permanent
     Job location:Europe only
     Date available:immediately
     Industry:
     KeywordsRadar Systems digital signal processing VHDL and FPGA
    CV

    I authorize the treatment of my personal data as per law 13 D.lgs. 196/03 valid in Italy.

     

    CURRICULUM VITAE

    Education

    Ø       Master Degree (1995-2001):

    Electronic Engineering

    Ø       At the:

    Politecnico of Turin,   final mark : 110/110 cum Laude

    Ø       Master Thesis: “Modal Tecniques for the electromagnetic analysis of passive components in ridge waveguides” Rel: Prof. Renato Orta, Prof. Riccardo Tascone, “Politecnico of Turin”.

    Ø       High school:

    o         Scientific License (1990-1995), final mark 60/60.

    Ø       English study

    o        British school, attended for nine years

    o        PET certification with merit

    Languages

    Ø       English:

    Good in reading, writing and conversation;

    Preliminary English Test, University of Cambridge.

    Ø       French: scholastic level

     

    Technical Skills

    Ø  Strong knowledge of Radar Systems and communication systems  (GSM UMTS)

    Ø  Knowledge of System Simulation/Signal Processing techniques and Matlab Language (> 5y)

    Ø  Capability to develop under Simulink environment simulation models for complex systems and functions;

    Ø  Architecture definition of electronic systems and Hardware/software partitioning;

    Ø  Strong knowledge of VHDL language and of Xilinx System Generator Tool for the design of logic circuits and communication interface  (PCI, VME, RocketIO, HotLink) (>7 y);

    Ø  Knowledge of all the design flow for producing programming files for the FPGA starting from RTL-HDL description

    Ø  Knowledge of C language and of the VxWorks environment for the implementation of SW functions for embedded systems

    Ø  Model of proportional navigation based systems;

    Ø  Currently leading the activities of a group made by myself and four other engineers

    Professional

    Experience

    July 2012-Today: Aresys SRL, MILANO

    Qualification:Head of Electronic Developments Area

    Market of operation: Remote Sensing

    Ø          Work Experiences at Aresys:

    o    Leading the development of a Real Time SarRadar Emulator tailored for an UAV paltform. The system is COTS based (Curtiss-Writght and 4DSP) and its purpose is to generate (@IF level) the echos as would been received by a SAR Radar Processor (targeted for UAV SAR) in order to test it in laboratory. The system has been developed for an important non European global player of defense industry.

    o    Built-up of Electronic HW/System Department. During first year of activities the area grew-up fastly and now reached an number of five engineers. Main project involving the area is the development of a low cost and reduced dimensions Radar Sensor and UAV SAR emulator.

    o    Leading the development of an FMCW Radar Sensor. Main sub-activities were (all internal developments):

    §  System Architecture and Design;

    §  System Simulations (Matlab/Simulink);

    §  Software and FPGA/FW developments (VHDL, System Generator, C Language);

    §  Local Oscillator / synthesizer developments;

    §  Power Supply Unit;

    §  Antenna and Transceiver are COTS modules;

    o    Development of a Simulink model for the simulation of the complete physical Layer of GSM communication system

     

    April 2005-June 2012: Elettronica SPA, ROMA

    Qualification:System Architect / Analyst and Digital Designer

    Market of operation: Systems for Radar Electronic Warfare

    Ø          Work Experiences at Elettronica:

    o    Leading an italian founded project for the study and developement of Jamming Codes (special modulations for the deceive of infrared missiles). An important aspect of this project is the development of an engagement simulator (missile-target) to verify effectiveness of codes.

    o    Design at system level and leading developement of the SW for management and allocation of HW resources for a Laser DIRCM system (Direct Infrared Counter Measures)

    o    Design of a simulator of Missile Warning System made of:

    §  HW COTS: Matrox Card for the acquisition and the processing of images, Power PC & VxWorks Curtiss-Wright, Host PC, HW for  MIL-BUS-1553 management

    §  SW for the management of communication, and of MMI interface. SW has been developed partially under Visual Studio partially under WindRiver-workbench environment.

    §  Algo level SW for the Image Processing. Purpose was to analyze captured images in order to extract emitting sources

    o    Algorithmic study and implementation on FPGA, of a firmware aimed to phase goniometry. The developed block estimates azimuth and elevation of the Direction of Arrival of an emission using the measures of phase difference among different channels, provided from a digital receiver. Finally, the block converts the estimations from the local antenna-panel reference, into a fixed reference, knowing the navigation data.

    o        Development of a latest generation Digital Receiver Unit. One of the main challenges was to align four A/D converters of 3Gsps. The hardware used were the boards from VMETRO. In this project I actively worked either at the algo & specification phase or at HDL and SW development. (VHDL and C/VxWorks were the tools I used)  

    o        Algorithmic-Architectural study for a Digital Down Converter, highly reconfigurable, multichannel in band 0-100 MHz, and IF band between 5 KHz e 5 MHz. Implementation of the DDC in Xilinx System Generator and prototypation on FPGA Xilinx Virtex-4.

    o        Rapid Prototyping Methodology: I lead succesfully a pilot project which purpose was to set up and demonstrate the “hardware in the loop” design methodolgy, where the Matlab/Simulink simulator, System Software, System Hardware work toghether according to the following tasks:

    §         Matlab Simulink Simulator: transmits stimuli;

    §         System Sofware: Implements software algos and controls, communicates with the hardware by means of memory mapped registers;

    §         System Hardware: it is the digital architecture of the system (equivalent System Generator /VHDL) ;

    The case study was the digital receiver, the most complex board present in the company. It was emulated on three boards Alpha-Data interconnected using serial links. Original source code was written in VHDL, a system Generator part has been added to it and all has been co-simulated whether in ModelSim environment or in Hardware.

    May 2002 – April 2005at  STMicroelectronics

    Qualification: Digital Architect.

    System of communication UMTS.

    Ø          Interesting Experiences  (all developements are in VHDL):

    o        Research  (in a multisite team) of innovative solutions to the problem of high communication speed for Turbo Codes (from tens to hundreds of Mbps) in particular providing efficient IPs for solving the “interleaver bottleneck”. In the ambit  of this activity I produced a paper that I cite later on.

    o        Study and plementation of the Synopsys Power Methodology, for making estimates on dissipated power from digital circuits, investigating the impact of clock-gating on power consumption.

    o        Partecipation to the developement of a modem for the HSDPA channel of UMTS. It was made by an Inner Modem (based on a MMSE Equalyzer in the frequency domain) and an Outer Modem based on the Turbo Decoder

    o        Architectural study and implementation in VHDL of an FFT – Radix-4 of very small dimensions and variable number of points. The core was at the basis of the MMSE Equalyzer;

    Ø       Prototypation

    o          FPGA: synthesis of components descripted in VHDL for FPGA Xilinx

    o          Post Place and Routesimulations also in Verilog (useful for power estimations) integrating SDF file for delays;

    o        Board: Use of 4DSP, Curtis-Wright, VMETRO, Alpha-Data and Nallatech boards.

     Computer Skills

    Operating Systems: Solaris, Windows user level;

    Programming Languages:

    VHDL, C, Matlab at very high level;

    C++ at superficial level

    Tools:

    Matlab/Simulink/system Generator

    Cadence ncsim, Mentor Modelsim,

    Synopsys design_compiler,

    Simplicity  Synplify Pro,

    Xilinx ISE

    JTAG tools for Desing For Testability

    Conrtanct & Salary

    Full-time 7^CCNL Metalmeccanico

    Salary of 52.000 Euro



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