Latest Space News
Wed, 05 Aug 2020 01:15:11 +0000
Satellite propulsion startup Benchmark Space Systems announced an agreement Aug. 4 to provide non-toxic chemical propulsion for rideshare provider Spaceflight Inc.’s next-generation orbital transfer vehicle, Sherpa-NG. SpaceNews
Tue, 04 Aug 2020 23:00:07 +0000
USC students will build the satellites and integrate them with Lockheed Martin’s SmartSat mission payload. SpaceNews
Tue, 04 Aug 2020 22:11:17 +0000
For the first time, the National Oceanic and Atmospheric Administration is soliciting proposals for commercial radio occultation satellite data to feed operational weather forecast models. SpaceNews
Tue, 04 Aug 2020 21:25:05 +0000
Tournear says the Space Development Agency wants to create a market so the industry can plan investments. SpaceNews
Tue, 04 Aug 2020 19:56:52 +0000
Rocket Lab announced Aug. 4 it has increased the payload capacity of its Electron launch vehicle thanks to improvements in the batteries used in the rocket. SpaceNews
Tue, 04 Aug 2020 18:54:18 +0000
General Atomics Electromagnetic Systems announced an agreement Aug. 4 to design a prototype for the U.S. Space Force Electro-Optical Infrared Weather System. SpaceNews
Tue, 04 Aug 2020 17:52:44 +0000
Forbes has been Blackjack’s deputy program manager since 2018. SpaceNews
Tue, 04 Aug 2020 16:05:53 +0000
Synthetic aperture radar startup PredaSAR has signed a contract to launch a small satellite with SpaceX, and is in discussions to launch its entire first constellation with the company, PredaSAR co-founder Marc Bell, said Aug 4.  SpaceNews
Tue, 04 Aug 2020 15:00:40 +0000
Amazon Web Services has slowed the rollout of its ground station network to accommodate customer feedback about the best locations to place its antennas.  SpaceNews
Tue, 04 Aug 2020 14:46:48 +0000
NASA has established an office to coordinate rideshare launch opportunities for its growing number of smallsat science missions, taking advantage of excess capacity on launches of larger spacecraft. SpaceNews
Tue, 04 Aug 2020 11:34:44 +0000
Executives with several major small launch vehicle companies say both the economic repercussions of the pandemic and the growing interest by the U.S. government in such vehicles could reshape the industry. SpaceNews
Tue, 04 Aug 2020 10:02:28 +0000
Loft Orbital on Aug. 4 announced a contract to provide the spacecraft platform and arrange a launch for a Canadian quantum communications experiment.  SpaceNews
Mon, 03 Aug 2020 23:46:49 +0000
Virgin Galactic has pushed the beginning of commercial flights of its SpaceShipTwo suborbital vehicle to no earlier than the first quarter of 2021 while announcing plans to sell additional stock to raise money. SpaceNews
Mon, 03 Aug 2020 22:28:33 +0000
Michael O’Rielly had been nominated in March for a new five-year term as member of the Federal Communications Commission. SpaceNews
Mon, 03 Aug 2020 21:45:37 +0000
Army cadets at West Point learn how to build small satellites and rockets. Some also are considering competing to be a NASA astronaut. SpaceNews
Mon, 03 Aug 2020 21:10:22 +0000
Scolese said the NRO "will be able to do more with smaller satellites.” SpaceNews
Mon, 03 Aug 2020 20:02:06 +0000
A cubesat launched earlier this year has successfully tested a version of an instrument that will fly on a larger NASA mission in development. SpaceNews
Mon, 03 Aug 2020 18:41:07 +0000
Swarm Technologies is working with Exolaunch of Germany to send 24 SpaceBee satellites into orbit on the SpaceX Falcon 9 small satellite rideshare mission scheduled to launch in December. SpaceNews
Mon, 03 Aug 2020 18:27:20 +0000
Ball Aerospace says it has successfully flight-tested a green propellant developed by the Air Force, and is lowering the satellite’s altitude so that it deorbits in the coming weeks.  SpaceNews
Mon, 03 Aug 2020 18:00:33 +0000
Made In Space is underscoring national security applications for its in-space robotic assembly and additive manufacturing technologies at the annual Small Satellite Conference. SpaceNews
More space news...
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  • CV: Electronics Design & Firmware Engineer

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
     Mobile:<withheld>
    Candidate Profile
     Date Submitted:29-03-2018
     Last Modified:29-03-2018 (07:40)
    Job information
     Current job:Electronics Design & Firmware Engineer
     Employment Term:Temp/Contract
     Job location:Own country
     Date available:within 2 months
     Industry:Consulting/Engineering Services
     KeywordsFPGA, Verilog, VHDL
    CV

    Profile

    Highly motivated Design Engineer with deep knowledge of embedded systems, FPGA, C, Verilog HDL and VHDL. Undertaking a contract job as an Electronics Design & Firmware Engineer in GE.

    Keen, pragmatic, conscientious, analytical, hardworking individual who is ambitious and goal orientated.  Now seeking next rewarding career opportunity to demonstrate substantial abilities and make an effective contribution in a successful product focused team.

     

    Overview

    11/4 years’ experience as a system engineer

    51/4 years’ experience as a design engineer (FPGA developer and embedded systems)

    Excellent knowledge of Verilog, VHDL, C and C++languages

    Experience of using ASIC (Synopsis and Cadence ASIC design tools), Lab View, MATLAB, Altium and Visual Studio – with a high level of dexterity with Code Compose Studio, Multisim, ModelSim and Xilinx design suit, Vivado design suit, Altera design suit.

    Experience of using sub version system (GitHub, SVN)

    Understanding of Cadence, PLC, System Verilog, and UVM methodology

    Meet tight and demanding deadlines under pressure

    Able to communicate proactively with clients and senior management 

    Punctual and enthusiastic person who works well individually and as part of a team

    Willing to adapt into different working environments and use skills to contribute positively to any situation

     

    Employment History

     

    May 2017 – To Date

    Employer:          GE Power

    Job Title:            Electronics Design & Firmware Engineer

     

    Project:

    Series 5 Valve Base Electronics

    Series 6 Valve Base Electronics

    Sub Module (Gate Electronics) Verification

    Responsibilities:

    Renovating and Testing series 5 VBE (valve base electronics) Altera base design to Xilinx environment.

    Designing and developing series 6 VBE firmware architecture. and substantial hands-on contributions to product with direct ownership of various implementation, and ongoing support issues.

    Implementation, development and Testing of various communication protocols like PON, PCIe, 1G Ethernet, UART Interfaces, I2C.

    Used System Verilog to test and verify Gate Electronics Firmware.

    Achievements:

    Next Generation Series 6 VBE firmware architecture.

     

    Aug 2016 – May 2017

    Employer:          BioGene

    Job Title:            Electronics Engineer

     

    Project:

    Control of temperature of ‘new large tube rig’. (QuRapID)

    QuType automation

    Spectrometer Control.

    Responsibilities:

    Assessment of concepts and techniques for temperature control for QuRapID using PID controller in VHDL on Spartan 6.    

    Designing spectrometer electronics using Altium and developing algorithms in C (controlling CCD image sensors) using PIC 32 microcontroller and developing .Net testing platform to communicate with spectrometer electronics.

    Testing of SPI, UART Interfaces.

    Solenoid Timer base control.

    Achievements:

    Planned and developed algorithms for PID Controller for QuRapID.

    Automated QuType for Lab Testing on real Virus.

     

    Nov 2014 – Mar 2016

    Employer:          SUPARCO

    Job Title:            System Engineer

     

    Project:

    Transmission, Tracking and Control (TT&C) Communication system for remote sensing satellite

    AES Core Integration in TCP/IP communication on Spartan 6

    Interfacing of Si8900/1/2 with FPGA Using SPI protocol

    Responsibilities:

    Assessment of concepts and techniques for satellite TT&C communication systems for both space and ground segment

    Designing and developing algorithms in C for on board satellite data handling computer to ground segment

    Development, integration and testing of satellite central terminal unit (CTU) using ECSS standards by using SysBIOS

    Testing of CANBUS, SPI, UART, Serial and parallel NAND Flashes.

    Achievements:

    Designed architecture and developed algorithms for on board satellite data handling computer to ground segment communication

    Tested interfaces like CANBUS, SPI with Taxes Instrument microcontroller

    Interfaced SPI protocol for commination with ADC.

     

    Mar 2014 – Nov 2014

    Employer:          PowerSoft19

    Job Title:            Embedded System Developer

     

    Project

    Modification of Cattron Control Joystick style transmitter

     

    Responsibilities:

    Developed device drivers for various hardware peripherals such as serial-EEPROM and RTC on I2C and SPI

    Coding to support Cattron on-board analogy input channels, schedule blocks and auto-detection of hardware resources configured by the user

    Design, implementation and debugging firmware in C using Microchip and logic analyser

    Implemented test case for MMCU module of Crane on National Instrument Test Stand tool

    Achievement:

    MMCU test unit of crane and train transmitter

     

    Aug 2012 – Aug 2013

    Employer:          Open Silicon

    Job Title:            Design Engineer

     

    Project

    Micron NAND Flash Model and Controller IP Core

    Responsibilities:

    Design and Implement NAND flash model using Micron standard (in System Verilog and C) for timing requirement and FSM respectively

    Provide NAND Flash Controller Testing Environment by using ONFI standard

    Using Synopsys and Xilinx tools for development in Verilog, System Verilog and C

    Testing storage protocols using UVM Environment

    Planning, organising, and executing design projects resulting in enhancement of existing products

    Achievement:

    Completed NAND Flash Model and Controller tested in system Verilog.

     

    Sep 2011 – Jul 2012

    Employer:          Technological Research Solution (Teresol)

    Job Title:            FPGA Design Engineer

     

    Project

    H.264 Video Compression IP Core

    Testing of DVM (Digital Video Manager)

    Responsibilities:

    Performed detailed calculations to broaden DVM product standards and specifications

    Implement RS 232, 485 interfacing techniques

    Implementation of H.264 video compression technique in an IP camera

    Worked on DDR2 RAM interfacing in FPGA Spartan 3 and Spartan 6

    Development, testing and documentation of RTL level modules

    Achievement:

    Developed residual generator in H.264 video compression IP core.

    Tested DVM in Xilinx and Spartan 6.

     

    Education/Qualifications

    2007 – 2011         BEng Electronics

    CGPA 3.41/4.00      National University of Science and Technology

    2005 – 2007         Maths, Physics, Chemistry

    A, A, A                The Educators College

     

    Hobbies

    Interest in cultural anthropology

    Energetic player of Table tennis


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