Latest Space News
Fri, 19 Oct 2018 22:06:59 +0000
Vector, one of dozens of ventures developing small launch vehicles to serve perceived high demand for small satellite launches, announced Oct. 19 that it closed a $70 million Series B round to move into full operations. SpaceNews.com
Fri, 19 Oct 2018 19:41:19 +0000
Three regional satellite operators with C-band coverage over the United States have complained to U.S. telecom regulators about being left out of a group led by four of the world’s largest satellite operators to arrange a proposed spectrum transfer to the wireless industry. SpaceNews.com
Fri, 19 Oct 2018 18:20:52 +0000
Thornberry's letter to DoD: "It is important for us to understand the benefits and challenges of a full range of options.” SpaceNews.com
Fri, 19 Oct 2018 16:45:34 +0000
François Lombard, who took the helm at Airbus Intelligence in early 2017, is encouraging this type of innovation and partnerships like the ones formed recently with Earth observation constellation operator Planet and Orbital Insight, a geospatial analytics company. SpaceNews.com
Fri, 19 Oct 2018 00:50:39 +0000
As NASA evaluates proposals for commercially developed small lunar landers, the agency is now seeking payloads that could fly on those spacecraft despite concerns from some scientists that they don’t know if their experiments are compatible with those landers. SpaceNews.com
Thu, 18 Oct 2018 17:00:25 +0000
The last mission needed to complete Iridium Communications’ second-generation satellite constellation is scheduled for Dec. 30, Iridium CEO Matt Desch said today. SpaceNews.com
Thu, 18 Oct 2018 08:26:14 +0000
SMM Hamburg, the biennial international maritime conference in Germany Sept. 4-7, attracted not only shipbuilders but also satellite operators eager to offer global communications for autonomous vessels. SpaceNews.com
Wed, 17 Oct 2018 21:44:31 +0000
Between now and when the the Air Force starts buying launch services from new competitors, ULA and SpaceX will be competing “one mission at a time.” SpaceNews.com
Wed, 17 Oct 2018 19:23:01 +0000
To connect the masses, megaconstellations will need mega antennas mega cheap. Antenna makers need mega orders to make that happen. SpaceNews.com
Wed, 17 Oct 2018 19:11:40 +0000
Intelsat invested in Africa Mobile Networks (AMN), a U.K.-headquartered group of companies with telecom infrastructure in Africa, to reach "ultra-rural" parts of the sub-Saharan side of the continent. SpaceNews.com
Wed, 17 Oct 2018 18:37:44 +0000
As the Pentagon moves to stand up a U.S. Space Command and Congress debates whether it makes sense to create a Space Force, a central focus is to defend satellites from orbital weapons that would seek to damage or destroy U.S. assets in space. SpaceNews.com
Wed, 17 Oct 2018 15:27:27 +0000
Small launch vehicle company Rocket Lab announced Oct. 17 that it will build its second launch pad, and first in the United States, at Wallops Island in Virginia. SpaceNews.com
Wed, 17 Oct 2018 07:58:08 +0000
This was ULA’s eighth launch this year, the 131st since the company was formed in 2006, and will be its 50th launch for the U.S. Air Force. SpaceNews.com
Tue, 16 Oct 2018 22:57:26 +0000
A Swedish company with plans for a geostationary communications satellite announced Oct. 16 a contract with SpaceX for a Falcon Heavy launch no earlier than the fourth quarter of 2020. SpaceNews.com
Tue, 16 Oct 2018 20:52:46 +0000
The NASA astronaut who was on the aborted Soyuz mission to the International Space Station says he has “complete confidence” in the Russians despite this launch failure and other problems and looks forward to flying again on the spacecraft. SpaceNews.com
Tue, 16 Oct 2018 19:37:17 +0000
For all the enthusiasm about lunar exploration, and announcements made during the conference, there were far fewer specific details about just how to achieve those goals. SpaceNews.com
Tue, 16 Oct 2018 18:26:57 +0000
ThinKom’s recent collaborations with satellite operators Telesat and SES have the antenna builder jockeying to compete with Viasat, IsoTropic Systems and others in the race to build affordable high-tech antennas that can link with satellite constellations in non-geosynchronous orbits. SpaceNews.com
Mon, 15 Oct 2018 23:40:09 +0000
45th Space Wing Commander Brig. Gen. Schiess: Gen. Raymond “is pushing us to look at ways to be more responsive.” SpaceNews.com
Mon, 15 Oct 2018 23:06:02 +0000
Paul Allen, the billionaire co-founder of Microsoft who backed the winning entry in a suborbital spaceflight competition and later funded development of a massive air-launch system, passed away Oct. 15. SpaceNews.com
Mon, 15 Oct 2018 21:50:15 +0000
The status of proposals to create a separate branch of the U.S. military devoted to space will be the subject of the next meeting of the National Space Council on Oct. 23. SpaceNews.com
More space news...
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  • CV: Electronics Design & Firmware Engineer

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    Personal information
     Name:<withheld>
     Age:<withheld>
     Country:<withheld>
     Location:<withheld>
    Contact information
     Email:<withheld>
     Phone:<withheld>
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    Candidate Profile
     Date Submitted:29-03-2018
     Last Modified:29-03-2018 (07:40)
    Job information
     Current job:Electronics Design & Firmware Engineer
     Employment Term:Temp/Contract
     Job location:Own country
     Date available:within 2 months
     Industry:Consulting/Engineering Services
     KeywordsFPGA, Verilog, VHDL
    CV

    Profile

    Highly motivated Design Engineer with deep knowledge of embedded systems, FPGA, C, Verilog HDL and VHDL. Undertaking a contract job as an Electronics Design & Firmware Engineer in GE.

    Keen, pragmatic, conscientious, analytical, hardworking individual who is ambitious and goal orientated.  Now seeking next rewarding career opportunity to demonstrate substantial abilities and make an effective contribution in a successful product focused team.

     

    Overview

    11/4 years’ experience as a system engineer

    51/4 years’ experience as a design engineer (FPGA developer and embedded systems)

    Excellent knowledge of Verilog, VHDL, C and C++languages

    Experience of using ASIC (Synopsis and Cadence ASIC design tools), Lab View, MATLAB, Altium and Visual Studio – with a high level of dexterity with Code Compose Studio, Multisim, ModelSim and Xilinx design suit, Vivado design suit, Altera design suit.

    Experience of using sub version system (GitHub, SVN)

    Understanding of Cadence, PLC, System Verilog, and UVM methodology

    Meet tight and demanding deadlines under pressure

    Able to communicate proactively with clients and senior management 

    Punctual and enthusiastic person who works well individually and as part of a team

    Willing to adapt into different working environments and use skills to contribute positively to any situation

     

    Employment History

     

    May 2017 – To Date

    Employer:          GE Power

    Job Title:            Electronics Design & Firmware Engineer

     

    Project:

    Series 5 Valve Base Electronics

    Series 6 Valve Base Electronics

    Sub Module (Gate Electronics) Verification

    Responsibilities:

    Renovating and Testing series 5 VBE (valve base electronics) Altera base design to Xilinx environment.

    Designing and developing series 6 VBE firmware architecture. and substantial hands-on contributions to product with direct ownership of various implementation, and ongoing support issues.

    Implementation, development and Testing of various communication protocols like PON, PCIe, 1G Ethernet, UART Interfaces, I2C.

    Used System Verilog to test and verify Gate Electronics Firmware.

    Achievements:

    Next Generation Series 6 VBE firmware architecture.

     

    Aug 2016 – May 2017

    Employer:          BioGene

    Job Title:            Electronics Engineer

     

    Project:

    Control of temperature of ‘new large tube rig’. (QuRapID)

    QuType automation

    Spectrometer Control.

    Responsibilities:

    Assessment of concepts and techniques for temperature control for QuRapID using PID controller in VHDL on Spartan 6.    

    Designing spectrometer electronics using Altium and developing algorithms in C (controlling CCD image sensors) using PIC 32 microcontroller and developing .Net testing platform to communicate with spectrometer electronics.

    Testing of SPI, UART Interfaces.

    Solenoid Timer base control.

    Achievements:

    Planned and developed algorithms for PID Controller for QuRapID.

    Automated QuType for Lab Testing on real Virus.

     

    Nov 2014 – Mar 2016

    Employer:          SUPARCO

    Job Title:            System Engineer

     

    Project:

    Transmission, Tracking and Control (TT&C) Communication system for remote sensing satellite

    AES Core Integration in TCP/IP communication on Spartan 6

    Interfacing of Si8900/1/2 with FPGA Using SPI protocol

    Responsibilities:

    Assessment of concepts and techniques for satellite TT&C communication systems for both space and ground segment

    Designing and developing algorithms in C for on board satellite data handling computer to ground segment

    Development, integration and testing of satellite central terminal unit (CTU) using ECSS standards by using SysBIOS

    Testing of CANBUS, SPI, UART, Serial and parallel NAND Flashes.

    Achievements:

    Designed architecture and developed algorithms for on board satellite data handling computer to ground segment communication

    Tested interfaces like CANBUS, SPI with Taxes Instrument microcontroller

    Interfaced SPI protocol for commination with ADC.

     

    Mar 2014 – Nov 2014

    Employer:          PowerSoft19

    Job Title:            Embedded System Developer

     

    Project

    Modification of Cattron Control Joystick style transmitter

     

    Responsibilities:

    Developed device drivers for various hardware peripherals such as serial-EEPROM and RTC on I2C and SPI

    Coding to support Cattron on-board analogy input channels, schedule blocks and auto-detection of hardware resources configured by the user

    Design, implementation and debugging firmware in C using Microchip and logic analyser

    Implemented test case for MMCU module of Crane on National Instrument Test Stand tool

    Achievement:

    MMCU test unit of crane and train transmitter

     

    Aug 2012 – Aug 2013

    Employer:          Open Silicon

    Job Title:            Design Engineer

     

    Project

    Micron NAND Flash Model and Controller IP Core

    Responsibilities:

    Design and Implement NAND flash model using Micron standard (in System Verilog and C) for timing requirement and FSM respectively

    Provide NAND Flash Controller Testing Environment by using ONFI standard

    Using Synopsys and Xilinx tools for development in Verilog, System Verilog and C

    Testing storage protocols using UVM Environment

    Planning, organising, and executing design projects resulting in enhancement of existing products

    Achievement:

    Completed NAND Flash Model and Controller tested in system Verilog.

     

    Sep 2011 – Jul 2012

    Employer:          Technological Research Solution (Teresol)

    Job Title:            FPGA Design Engineer

     

    Project

    H.264 Video Compression IP Core

    Testing of DVM (Digital Video Manager)

    Responsibilities:

    Performed detailed calculations to broaden DVM product standards and specifications

    Implement RS 232, 485 interfacing techniques

    Implementation of H.264 video compression technique in an IP camera

    Worked on DDR2 RAM interfacing in FPGA Spartan 3 and Spartan 6

    Development, testing and documentation of RTL level modules

    Achievement:

    Developed residual generator in H.264 video compression IP core.

    Tested DVM in Xilinx and Spartan 6.

     

    Education/Qualifications

    2007 – 2011         BEng Electronics

    CGPA 3.41/4.00      National University of Science and Technology

    2005 – 2007         Maths, Physics, Chemistry

    A, A, A                The Educators College

     

    Hobbies

    Interest in cultural anthropology

    Energetic player of Table tennis


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