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CV: Vega Launcher Avionics Engineer
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Date Submitted: Last Modified: Current job: Employment Term: Job location: Date available: Industry: Keywords|
Personal information |
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Nationality |
Italian |
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Date of birth |
24.11.1974 |
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Gender |
Male |
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Work experience |
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Dates |
From 04.2015 to present |
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Name and address of employer |
AVIO – Via Ariana Km 5.2, Colleferro (Rome), Italy |
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Type of business or sector |
Launchers Engineering |
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Occupation or position held |
Technical responsible of VEGA and VEGA-C Launchers Multi Functional Unit, Telemetry Subsystem, and Inertial Reference System |
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Main activities and responsibilities |
Requirements definition Analysis of Vega-C launcher system requirements and definition of technical requirements for GNC Avionic Subsystems and Telemetry Subsystem.
Project management Responsible for the design and implementation of the equipments, guaranteeing the respect of defined technical and time requirements. Monitoring on all the activities of the suppliers. Progress and review meetings with customers and suppliers.
Manufacturing management Responsible for the VEGA equipments manufacturing Manufacturing reviews with suppliers and customers
Flight data analysis After each Vega launch, analysis of the flight data of the launcher GNC subsystem at L0 and L1 level and production of the relevant reports Management of anomalies
Launcher mission telemetry formats definition Definition of launcher telemetries acquired in the different phases of the launcher mission
Documentation Production and maintenance of documentation (specifications, interface control documents, user manuals, design descriptions, technical notes, test plans and reports) |
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Dates |
From 01.2012 to 03.2015 |
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Name and address of employer |
Thales Alenia Space – via Saccomuro 24, Rome, Italy |
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Type of business or sector |
Satellite Engineering |
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Occupation or position held |
Satellite TT&C transponder and telecommunication payload engineer for the programs EXOMARS, SOLAR ORBITER, Low Cost UHF Processor payload. |
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Main activities and responsibilities |
Equipment design and test Analysis of equipment system functional, performance, and interface requirements Allocation of equipment functionalities to different internal functional modules Definition of type of implementation (HW or SW) and requirements of each functional module, and of the interfaces connecting them Design of digital electronics architectures, Digital Signal Processing algorithms, analogue transmitter and receiver architectures (often through simulations carried out using software and models personally developed) Support to digital and analogue electronics implementation and testing Equipment functional and performance validation by defining test specifications and executing test at module and equipment level
Project management Responsible for the design and development of the Low Cost UHF Processor payload Digital electronics design management and monitoring Progress and review meetings with customers
R&D Participation in R&D programmes (e.g. Study, analysis, and simulation of a Digital Adaptive Array Antenna system to protect the signals of future TT&C communication systems against jamming interference; Study, analysis, design, and simulation of a PLL with Digital Phase-Frequency-Detector for future Deep Space Transponders) Documentation Production and maintenance of documentation (specifications, interface control documents, user manuals, design descriptions, technical notes, test plans and reports)
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Dates |
From 10.2006 to 12.2011 |
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Name and address of employer |
Thales Alenia Space – via Saccomuro 24, Rome, Italy |
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Type of business or sector |
Satellite Engineering |
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Occupation or position held |
Satellite Synthetic Aperture Radar (SAR) Engineer for the programs COSMO Skymed, KOMPSAT-5, SENTINEL-1, CARMES, WAGES, ARPA |
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Main activities and responsibilities |
Requirements definition SAR system requirements analysis and SAR digital subsystem (HW and SW) requirements definition Analysis and simulations (often through specific software and models personally developed) for the design of digital signal processing algorithms and architectures
Project management Responsible for the design and development of the SAR digital electronics, ensuring technical quality as well as schedule compliance Understanding of electronics design and implementation Understanding of embedded software architecture and operations Monitoring on all the activities performed by suppliers Progress and review meetings with customers and suppliers
Verification Digital subsystem functional and performance validation by defining test specifications, guaranteeing their execution and checking their results SAR instrument functional and performance validation at AIT process level by defining test specifications, guaranteeing their execution and checking their results R&D and proposals Participation in R&D programmes for SAR of future generation and proposals Documentation Production and maintenance of documentation (requirement specifications, interface control documents, user manuals, design descriptions, technical notes, test specifications and reports)
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Dates |
From 07.2003 to 09.2006 |
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Name and address of employer |
Thales Alenia Space – via Saccomuro 24, Rome, Italy |
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Type of business or sector |
Satellite Engineering |
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Occupation or position held |
Satellite payload digital signal processing and digital electronics designer for the programs BEPI COLOMBO (TT&C subsystem), SICRAL-1B (UHF telecommunication payload), FRACTIONAL-N DIRECT RF DIGITAL MODULATOR FOR SOFTWARE RADIO PLATFORM |
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Main activities and responsibilities |
Equipment design and test Analysis of equipment system functional, performance, and interface requirements Allocation of equipment functionalities to different internal functional modules Definition of type of implementation (HW or SW) and requirements of each functional module, and of the interfaces connecting them Design of digital electronics architectures, Digital Signal Processing algorithms, analogue transmitter and receiver architectures (often through simulations carried out using software and models personally developed) FPGA’s design, implementation, and test Support to analogue electronics implementation and testing Equipment functional and performance validation by defining test specifications and executing test at module and equipment level
Project management Responsible for the design and development of Sicral-1B UHF telecommunication payload Digital electronics design management and monitoring Progress and review meetings with customers
R&D and proposals Participation in R&D programmes and proposals
Documentation Production and maintenance of documentation (specifications, interface control documents, user manuals, design descriptions, technical notes, test plans and reports) |
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Education and training |
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Dates |
12.03.2013 |
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Title of qualification awarded |
Master of Science in Advanced Satellite Communication and Navigation Systems Final Grade: “CUM LAUDE” |
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Name and type of organisation providing education and training |
“Tor Vergata” University – Rome – Italy
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Principal subjects/occupational skills covered |
Master thesis: “Analysis and simulation of Adaptive Array Antenna Systems for jamming mitigation in TT&C communications” |
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Dates |
09.05.2003 |
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Title of qualification awarded |
University degree in Electronic Engineering (5 years Course) Final Grade: “CUM LAUDE” |
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Name and type of organisation providing education and training |
“Tor Vergata” University – Rome – Italy
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Principal subjects/occupational skills covered |
Degree thesis on Digital Electronic for Digital Signal Processing, developed for Thales Alenia Space (Rome) Thesis title: “Signal acquisition techniques based on spectral estimation: analysis and implementation of a digital signal processor for frequency hooking in Deep-Space radio-communications” Complete design of a FFT processor for spacecraft receivers: requirements analysis; preliminary studies, analysis, and trade-offs; architecture definition; Matlab simulations; VHDL coding; FPGA implementation; laboratory test |
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Personal skills and competences |
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Mother tongue |
Italian |
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Other languages |
English, French |
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Cambridge University “FIRST CERTIFICATE IN ENGLISH” (FCE) obtained in 2008, Cambridge University “CERTIFICATE IN ADVANCED ENGLISH” (CAE) obtained in 2012 |
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Social and Organisational skills and competences |
Very good organisation skills and interfacing capability, developed through the various types of team work carried out year by year Good communication and presentation skills Good ability to adapt to multicultural environments, gained through working with foreign colleagues and many journeys abroad Results oriented |
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Technical skills and competences |
Good command of electronic boards, FPGAs, and the associated development tools and methodologies Good command of laboratory instruments (oscilloscope, spectrum analyzer, logic analyzer, signal generator, etc) Good knowledge of digital and analogue electronic devices and architectures, bus and protocols, Digital Signal Processing algorithms, signal theory, Synthetic Aperture Radars (SAR), phased array antennas, communication systems |
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Computer skills and competences |
Good command of Microsoft Office™ tools (Word, Excel, PowerPoint) Good command of Matlab, Simulink, VHDL, and C Good command of Mentor Modelsim and Altera Quartus Good command of DOORS |
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Papers |
“Digital Adaptive Array Antennae for Jamming Effect Reduction in TT&C Communications”, S. Rossi, L. Simone, 6th ESA International Workshop on Tracking, Telemetry and Command Systems for Space Applications (TTC 2013), ESA-ESOC, 10 - 13 September 2013. “On-board signal acquisition: system trade-offs and implementation”, Cardarilli G.C., Comparini C., Del Re A., Re M., Rossi S., Simone L., Signal Processing and Information Technology, 2004. Proceedings of the Fourth IEEE International Symposium on 18-21 Dec. 2004 Page(s): 567 – 573. “Fractional-N Based GMSK Modulator for Satellite Telemetry Link”, N. Salerno, S. Rossi, D. Gelfusa, F. Barletta, F. Argentieri, S. Clementi, L. Simone, V. Piloni, 9th International Workshop on Signal Processing for Space Communications (SPSC2006), 11-13 September 2006, ESA ESTEC Noordwijk (The Netherlands). |
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Driving licence |
Full Clean |
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Additional information |
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Objectives |
To occupy a reference position in a technical/managerial area and have good possibilities of professional growth. |
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