CV: Digital HW Engineer



Personal information
Contact information
Candidate Profile
 Date Submitted:26-12-2009
 Last Modified:12-10-2017 (10:55)
Job information
 Current job:Digital HW Engineer
 Employment Term:Permanent
 Job location:Anywhere
 Date available:immediately
 Industry:Launch Systems
 KeywordsI have the experience in of a senior engineer and the will to learn of a junior one !



Scientific high    School      Anzio(RM)     Summer, 1988

                                            Vote 60/60


University of Rome    “LA Sapienza”       Rome       july, 2000

Bachelor in  Electronics Engineering.

·          Graduated with a thesis about MARSIS radar (Mars Express- Alenia Spazio project)                       vote 100/110



Work experience


ISL - ALTRAN                   Consultant                       Rome,Italy                              November 2000-February 2001


Reliability studies for RADAR in Alenia Marconi Syetems (Finmeccanica Group)

SIEMENS SpA                      intern                              Milan, Italy                                                February 2001 – March 2001

·         HW Engineer for the RADIO BASE dpt. Involved in the Radio-mobile UMTS HW design


Selex Galileo Spa    (Finmeccanica)          intern                              Pomezia,RM                             March 2001, present

·          HW engineer for Digital HW dpt. .

·           Involved in the Warfare Systems and in the Graphic boards development for the Tranche 2 Eurofighter Typhoon ,Tornado aircrafts and NH90,A129 helicopteres programmmes.

·          VHDL specialist for ASIC and FPGAs , involved both in communication and video processing applications

·          Now involved in the design of a high speed digital link based on an optical architecture (project with  Finmeccanica  industries and the support of Tor Vergata University in Rome)


General Electric - Intelligent Platforms (Rome)




March 2011-December 2015 :




Field Application Engineer for Military and Aerospace Embedded Systems.


Under EMEA sales director, responsible for the whole Italian market of GE-IP products.


System Architect.


Strong technical knowledge of :


Multicores/Multiprocessors Single Board Computers (SBCs)


General Purpose Graphic Processing Units (GPGPUs)


Embedded Switches, Routers (based on CISCO, Juniper Networks Routing SW )


Signal and Image Processing Boards


Avionics protocols



Abaco Systems (Rome)




December 2015-Present :




Senior Field Application Engineer for Military and Aerospace Embedded Systems at Abaco Systems.


Abaco System Spin-Off of GE Intelligent Platforms Embedded MIL/AERO Business.


Under EMEA sales director, responsible for the whole Italian and Balkan market of Abaco System products.




System Architect.


Strong technical knowledge about :


Multicores/Multiprocessors Single Board Computers (SBCs Intel/NXP/Freescale/ARM)


General Purpose Graphic Processing Units (GPGPUs)


Embedded Switches, Routers (based on CISCO, Juniper Networks Routing SW )


Signal and Image Processing Boards


Avionics boards/protocols


Neural Networks/Artificial Intelligence


Mil/Aero Safety Critical requirements





Ability to plan and follow challenging  programmes.


Strong attitude to deal with customers .


Leadership skills.


Presentations of systems solutions to customers.








·         Microsoft Word, Excel, PowerPoint, and MS Project, Matlab

·    HW tools : vhdl design entries (Visual Elite) synthesis (synplify pro) P&R (Xilinx,ACTEL,ALTERA) , Signal integrity (hyperlynx)

·    Board Architect(Mentor Graphics)

·    Avionic Systems , Mobile Networks , Radar Systems

·    Project Life cycle management, Requirements specifications , Risk analysis .


Programming Languages :  C, Visual C++, Fortran , Basic, Matlab


Knowledge : Radar Systems, Avionic Systems, Displays , Warfare Systems




Hardware Design Tools : Vhdl design entry , Synthesis and Fitting tools (Synplify Pro , Xilinx XST, Altera Quartus II )


FPGA technologies : Xilinx , Microsemi (Actel) , Altera, Lattice





·         Fluent:        English and Italian                  





·         Born in:            Anzio (Rm) on 22/07/1969




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