CV: Electronics Engineer


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Candidate Profile
 Date Submitted:10-10-2017
 Last Modified:10-10-2017 (04:11)
Job information
 Current job:Electronics Engineer
 Employment Term:Permanent
 Job location:Europe only
 Date available:immediately
 Industry:Civil Agencies/International Organizations, Satellite Manufacturers and Subcontractors, Satellite Operators, , , Launch Systems, Consulting/Engineering Services
 KeywordsI am an Electronic engineer with multi-disciplinary experience in electronic devices R&D, electronic test-benches, microelectronics, digital design, architecture definition, microprocessors and embedded systems. Telecommunications, RF and software enginee
CV

Electronics Engineer

 

 

Experience

2015-2017

(Jul – Jun)

Hardware Applications Engineer, CERN: Geneva, Switzerland.

 

Tested the Versatile Link Demo Board (VLDB, GBTx and SCA rad-hard ASICs) functionality using FPGA-based system: electrical, functional, thermal, slow control (I2C, SPI, JTAG), clock quality and radiation tests.

Provided user support (debug and develop systems, documentation, questions) for VLDB, GBTx, SCA, etc.

Acted as a link between ASIC designers and users.

Took part in the production and assembly of VLDB in collaboration with CERN workshop.

2013–15

(Jun–Jun)

Hardware Engineer, ESA and ISDEFE: Madrid, Spain.

 

Developed the project “Scientific Computing with FPGAs”.

Defined the system architecture and developed an FPGA SoC prototype that calculates the coordinates of a PSF centroid, using a model from the Gaia mission.

Designed and carried out tests that ensured the competence of the system.

Wrote technical reports about the system performance in time and precision.

Measured the algorithm acceleration achieved against other systems.

Worked under 3 separate contracts: ISDEFE, ESAC Visitor and Trainee.

Education

2014–2016

Master of ICT Research and Innovation: Universidad Autónoma de Madrid, specialization in High Performance Computing.

2008–2014

Master of Telecommunication Engineering: Universidad Autónoma de Madrid (5-year degree).

Other courses

2016

LabVIEW, CERN, given by NI instruments representative, 12 hours.

2015

Altera Timequest, CERN, given by IFI, 8 hours.

2014

NVIDIA CUDA and OpenACC, UAM, hands on training, 18 hours.

2014

Vivado FPGA Design, UAM, 30 hours.

Technical Skills

Languages

VHDL, C, Java, Python, Matlab, C++.

Tools

Xilinx Vivado Suite (including HLS and SDK), Modelsim, Altera Quartus, LabVIEW, CUDA, LaTeX, JIRA

Lab. Tools

Phase-noise analysers, advanced oscilloscopes, clock generators, protocol analyser.

Specs.

ESA ESCC Generic Specification No. 9000.

Published Papers

2016

“The Versatile Link Demo Board (VLDB)”, JINST for TWEPP 2016 Proceedings.

2015

Clasificación de tráfico de red mediante aceleradores hardware”, JCRA.

Languages

Spanish

Native competence.

English

Full professional proficiency. Cambridge English: Advanced certificate.

French

Basic competence.

 


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