CV: Electronic System / Architect



Personal information
Contact information
Candidate Profile
 Date Submitted:12-10-2015
 Last Modified:12-11-2017 (06:50)
Job information
 Current job:Electronic System / Architect
 Employment Term:Permanent
 Job location:Anywhere
 Date available:within 2 months
 Industry:Civil Agencies/International Organizations, Satellite Manufacturers and Subcontractors
 KeywordsVHDL Digital System FPGA Architect

Curriculum Vitae


Bremen, Germany



Telecommunications Engineer with many years experiences in digital system. Responsible of requirements definition and technical leader at equipment level along all the phases. Good knowledge of the space environment, interface between subsystems, high-speed communication protocols and digital processing.


Work Experience


01/2016 – Present

Electronic System Engineer


Airbus Defence & Space – Data Processing & OnBoard Computer – Bremen, Germany


Defining and managing equipment requirements

Leading along all phases (0 to D) of a project live

Defining equipment- and FPGA- architecture

Technically leading within cross-functional teams

Assessing feasibility and estimating costs

Interacting directly with customers and subcontractors

Defining test / verification concepts

Worked in:

Designed FPGA for On-Board concatenation box

Designed Test Equipment for an OBC on the ATV

Designed Degaussing Box for ACES project


05/2013 – 12/2015

Senior Hardware Engineer


SSBV – Noordwijk, Netherlands


Defining requirements and specifications between systems & sub-systems

Performing and providing technical support on digital developments and proposals

Defining architecture and resource estimation on sub-systems and FPGAs

Coordinating FPGA team activities

Defining PA and designing flows

Worked in:

SpaceWire Node, Router, RMAP and SpaceFibre

Defined and designed a new high-speed communication protocol base on WizardLink

Designed a new On-Board Computer for Space application such as SARadar

Defined a new generation of SARadar instruments

Designed a High Rate Modem and Baseband Processor


08/2011 – 12/2012

Microelectronic Engineer


Arquimea Ingeniería – Madrid, Spain

Configurable mixed-signal ASIC for Cosmic Vision instrumentation payload (in Medium frequencies 100k~10M; and High frequencies 10M~100M). The ASIC contains a set of blocks that can be individually configured through the configuration interface so the ASIC can be used for different applications. These configurable blocks are: ADC, DAC, DC DAC, LNA, Power Amplifier and Filter

Designing ASIC of mixed signal, digital / analog design

Performing and providing technical support for FPGA developments and proposals

Leading small groups of people

Supervising junior engineers and coordinating project tasks and milestones

Complete FPGA development including specification, design, verification and synthesis

Worked in:

Designed a configurable mixed signal ASIC (ADC, DAC, PA) in high frequencies

Designed an FPGA used for identifying Single Event Effects on a chip under qualification(radiation)


10/2010 – 08/2011

FPGA Manager


Airbus Defence & Space, Crisa – Madrid, Spain


Defining high level requirements and architecture

Supervising junior designers and coordinating project tasks and milestones

08/2008 – 08/2011

FPGA Engineer


Airbus Defence & Space, Crisa – Madrid, Spain


Complete FPGA development including specification, design, verification and synthesis

Coordinating project tasks and milestones

Interfacing external customers, providing technical documentation

Worked in:

Designed of an FPGA to cipher TM packets (Band-S) in real-time using AES algorithm

Designed of an FPGA in charge of TM, UART and control of a magneto-torque system (RIU)

Designed of an FPGA in charge of commanding an optical sensor




10/2009 – 06/2010

Master in Automation and Robotics


Technical University of Madrid (UPM, ETSII) – Madrid, Spain





Computer vision


10/1999 – 06/2007

MSc Telecommunications Engineering


University of Las Palmas de Gran Canaria (ULPGC, ETSIT) – Canary, Spain



Electronic and Automation

Signals and Communications

Economics, Mathematics and Physics


Personal Skills


Mother tongue



Other languages
















First Certificate in English (FCE). Lived in UK








Living in Germany








Lived in Netherlands


Levels: A1/2: Basic user - B1/2: Independent user - C1/2 Proficient user

Common European Framework of Reference for Languages


Communications skills

Clarity and concision



Organisational skills

Leadership, I have been responsible of small groups of people, but also coordinating subcontractors

Planning, as part of Technical leader I must define and follow project tasks and milestones



Job-related skills

Quality, as group leader I have defined quality processes and methodology of design & verification

Analytical thinker and Problem solving skills, in my daily work I have always been analytical and I have been searching for the best&simplest solution

Work under pressure, I have started several time projects already delayed and/or with tight project schedule

Fast learning, I have always been working in completely different projects and/or different technical knowledge or field. I am also good in getting quickly involved in projects already started


Computer skills

Microsoft Office tools

Microsoft Project

Matlab & Simulink


Modelsim, HDS-Designer, ActiveHDL, Synplify, Libero, ISE, Quartus, Cadence Spectre

C/C++, Bash, TCL, Perl, Java, ADA, Visual Basic



WaveForm, Labview



Microsemi: RTSX, RTAX, ProASIC3, SmartFusion2

Xilinx: Spartan3, Spartan6, Virtex7

Altera: Stratix3



ARM: Cortex-M3

Atmel: ATmega128



ECSS-Q-ST-60-02C, SpaceWire, RMAP, SpaceFibre, CANOpen, MIL-Bus 1553,

Internet protocol


Additional Information



Master Thesis: Development of a network interface for Network-on-Chip architecture (NoC) with QoS assurance. Awarded with honours distinction



Introduction to Artificial Intelligence Course (2011). Online Stanford University



Flying Satellites with my own designs on SPOT6, KazEOSat-1, Sentinel-2A


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