Born on 19/09/1977: 39 years old
Owner of a European driver licence
2005 PhD in Semiconductor Physics, Université Montpellier 2 (with honors).
2002 Master II Research. Theoretical and computational Chemistry, Université Nancy I.
2001 Master I in Chemistry, Université Nice-Sophia-Antipolis (with honors 2/44).
1996 Highschool degree in science, Lycée Stanislas Nice (with honors).
2016-17 Start-up on Semiconductors and LEDs
Senior consultant in Semiconductors and LED: Pi Lighting, Sion, Switzerland.
Consulting role to qualify embedded CMOS electronics on Solar Impulse plane and improve their robustness to natural radiations at stratospheric altitude.
Patent on a CMOS multichannel high bandwidth visible light communication device.
Build up of a SME instrument European project proposal (Horizon 2020) on our LiFi technology.
Implementation of a Matlab toolbox computing all existing colorimetry norms for any LED.
Writing of a book chapter on LED manufacturing, process variability and reliability (Springer).
Direct involvement in Delphi4LED, European project on LED electrical, optical, thermal compact modeling. Responsibilities: project management and process variability.
First author on a paper on LED variability electrical and optical measurement for the Therminic 2017 conference in Amsterdam, The Netherlands.
First author on a paper on the effect of process variability on LED colorimetry for the LpS 2017 conference in Bregenz, Austria.
Series of articles on metrics for horticulture and human centric lighting for Lightzoom lumière.
Customer support for our customers Philips Lighting and Acuity Brands.
2012-15 Development, Production, Quality, Customer interaction
Member of Technical Staff: GlobalFoundries, Fab1, Dresden, Germany.
Chip production for several customers: Qualcomm, Mediatek and MSTAR.
28nm polySiON chips manufacturing for fabless semiconductor companies.
Application: smartphones, tablets.
Responsible for the quality of SRAM memories in the chips delivered to Qualcomm, Mediatek, MSTAR in 28nm PolySiON technology.
At the center of our validation system (FMEA, PCRB), in contact with process engineers and module owners (Lithography, Device, Design, Yield, Metrology, Front-end, Back-end).
Responsible for the technical communication on SRAM memories with customers.
Key player in the wafer yield and transistors performance improvement process, in particular thanks to my involvement in the development of future technological nodes.
Responsible for the technology transfer to replicate Dresden technical know-how in our new Fab located in New-York State.
Management/Training of a young engineer in our team.
In 2 years time, yield doubled on key products (key in terms of volume and gross margin).
Improvement of production line stability (reduction of lot to lot variability).
Patent on innovative manufacturing lithography process to improve memory stability for the whole PolySiON platform.
2006-11 Applied Research
Senior scientist: PHILIPS-NXP, IMEC, Leuven, Belgium.
2009-11 Biosensor project
Design of a semiconductor CMOS device for the detection of biomolecules by capacitive effect. Application: home-care diagnostics market.
Responsible for surface chemistry activities (electrochemical characterization of self assembled monolayers, support for the development of new nanoelectrodes).
Measurements on test vehicle (with DNA, antigene/antibodies, Viruses).
Responsible for nanoelectrodes inspection by microscopy (optical, SEM).
Management/Training of 2 young engineers.
Programming of an extraction tool with GUI to analyze biosensor measurements.
Development of a new process to make electrochemically stable and bio-compatible Au-Cu alloy nanoelectrodes.
Co-author on a publication presented at IEDM 2010. Author of 2 abstracts presented at ENFI 2009.
1 Patent registered on Au-Cu alloy nanoelectrodes.
2007-08 Front-end CMOS project
Development on SOI FinFETs for advanced CMOS technologies for 32 and 22nm nodes.
Responsible for electrical characterization and process variability reduction.
Responsible for SRAM memory measurement and modelling.
Measurement and improvement of process/electrical variability. Our FINFET transistors variability has been reduced by 50% compared to previous technological nodes.
First author on a publication presented at IEDM 2008 (San Fransisco).
1 Patent registered on FINFET SRAM bitcells.
Technology transfer to TSMC: professional trips to Taiwan.
2006 Low Operating Power project
Responsibility: design of a SRAM low power bitcell.
Investigation on alternative SRAM bitcell design for low power application.
Development and validation of a Monte-Carlo simulator to predict memory array yield for advanced technological nodes. This tool used a flexible compact model to support transistors electrical characteristics extraction.
2002-05 PhD with the industry
PhD: STMicroelectronics/EADS, Montpellier and Grenoble, France.
Title: "Development and validation of a Monte-Carlo simulator to predict the soft error rate due to the natural radiation environment on advanced CMOS technologies"
Application: chips soft error rate prediction and radiation hardening for EADS and STMicroelectronics.
Integration of EADS proprietary nuclear physics database of neutron-Silicon interactions.
Modeling of various radiation environment: alpha particles sources, mono neutron sources, atmospheric neutron spectrum.
Tool validation based on accelerated measurements.
Soft error rate prediction for technological nodes under development (65nm, 45nm)
German: intermediate level (B1).
Dutch: intermediate level.
Simulation tools: TCAD (device simulator), SPICE (electric simulator), TRIM (particle-matter interaction), Exensio (plotter trend charts and scatter plots for CD, electrical and yield parameters correlations).
Programing languages: Matlab (expert), C/C++ (expert), Unix/Linux, C-Shell, Pascal. Python.
Scientific knowledge: Optoelectronics, Semiconductors physics, Nuclear physics, Microscopy (Optical, SEM, HIM), Electrical Characterization (probe stations), Electrochemistry and Potentiometry, Organic Chemistry, Surface Chemistry, Surface analysis (AFM, STM), Spectroscopy (FTIR, NMR). Statistical analysis (DOE,Cp,Cpk).
Office automation: Windows, Excel, Word, Powerpoint.
Technical training: Deep submicron CMOS IC (20h), Advanced IC-Technology (90h), Design Of Experiments, JMP, Exensio.
Non technical training: Emotional Intelligence, Managing successful projects, Conflicts management, Personal productivity improvement.
Swimming, Squash, Fitness, History, Geopolitics, Cultural events, Museum, Trips (USA, Taiwan, Vietnam, Maghreb, South Africa, Réunion and Guadeloupe islands, European countries).
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