Senior FPGA Engineer (PRJ)

Senior FPGA Engineer (PRJ)

DSI Aerospace Technologie

Bremen, Germany

We are looking for skilled and motivated colleagues who are passionate about developing and verifying high-quality and elegant FPGA engineering solutions for the leading European satellite missions.

What do we expect from you?

• Completed degree in Computer Science, Computer Engineering, Electronics or a comparable field
• At least 3–5 years of relevant professional experience in the field of FPGA Design or FPGA Verification
• A structured, independent and responsible approach to work and a high level of quality awareness
• A high level of knowledge and experience in Digital design
• A high level of knowledge in VHDL (preferred)/Verilog
• Knowledge of common communication protocols (e.g., AXI, Wishbone, SPI, I2C, Ethernet)
• Knowledge of external memory interfaces (e.g., SRAM, DDR, Flash) is an advantage but not mandatory
• Knowledge of high-speed Serdes links is an advantage but not mandatory
• Ability to analyse and optimize FPGA resource utilization and timing closure.
• Experience with and comfortable using common FPGA development environments and simulation tools
• Familiarity with the use of version control software
• Ability to see how your work fits into a larger project and product and readiness to work with colleagues to achieve its integration
• High level of written English and at least basic fluency in spoken English
• Ideally basic written and verbal ability in German

What are your responsibilities?

• Design, Development and Verification of complex FPGA Designs from specification to hardware integration
• Support Systems Engineers for FPGA-related customer requirement clarification
• Define FPGA requirement, which covers customer requirements (e.g., functional requirements, interface requirements, timing requirements, register definition, HW SW ICD, etc.)
• Develop FPGA architectural, RTL-coding and unit level simulation for FPGAs
• Define constraints and perform synthesis, layout and corresponding warning and timing analysis
• Develop test bench components, test cases and perform simulation together with FPGA design
• Support test engineers for FPGA integration in the field
• Detailed documentation of FPGA development cycles according to ECSS-Q-ST-60 standard